diff options
Diffstat (limited to 'src/mainboard/tyan')
-rw-r--r-- | src/mainboard/tyan/s2912/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/tyan/s2912_fam10/romstage.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index 80430cbf67..07f9efd71f 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -165,7 +165,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif - init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 2a9c2a491f..74c0aaabd3 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -199,7 +199,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "End FIDVIDMSR 0xc0010071 0x%08x 0x%08x\n", msr.hi, msr.lo); #endif - init_timer(); // Need to use TMICT to synconize FID/VID + init_timer(); // Need to use TMICT to synchronize FID/VID wants_reset = mcp55_early_setup_x(); |