summaryrefslogtreecommitdiff
path: root/src/mainboard/tyan
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/tyan')
-rw-r--r--src/mainboard/tyan/s2881/get_bus_conf.c102
-rw-r--r--src/mainboard/tyan/s2885/get_bus_conf.c114
-rw-r--r--src/mainboard/tyan/s2891/get_bus_conf.c212
-rw-r--r--src/mainboard/tyan/s2892/get_bus_conf.c196
-rw-r--r--src/mainboard/tyan/s2895/get_bus_conf.c216
5 files changed, 422 insertions, 418 deletions
diff --git a/src/mainboard/tyan/s2881/get_bus_conf.c b/src/mainboard/tyan/s2881/get_bus_conf.c
index c7b62c768d..332e578296 100644
--- a/src/mainboard/tyan/s2881/get_bus_conf.c
+++ b/src/mainboard/tyan/s2881/get_bus_conf.c
@@ -10,7 +10,6 @@
#include <cpu/amd/amdk8_sysconf.h>
#include <stdlib.h>
-
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_8131_0 = 1;
@@ -18,14 +17,13 @@ unsigned char bus_8131_1 = 2;
unsigned char bus_8131_2 = 3;
unsigned char bus_8111_0 = 1;
unsigned char bus_8111_1 = 4;
-unsigned apicid_8111 ;
+unsigned apicid_8111;
unsigned apicid_8131_1;
unsigned apicid_8131_2;
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -34,10 +32,10 @@ unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
-// 0x20202020,
+// 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -45,9 +43,8 @@ unsigned hcdnx[] =
// 0x20202020,
// 0x20202020,
};
-unsigned sbdn3;
-
+unsigned sbdn3;
static unsigned get_bus_conf_done = 0;
@@ -56,20 +53,21 @@ void get_bus_conf(void)
unsigned apicid_base;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
sbdn3 = sysconf.hcdn[0] & 0xff;
@@ -77,33 +75,35 @@ void get_bus_conf(void)
bus_8131_0 = (sysconf.pci1234[0] >> 16) & 0xff;
bus_8111_0 = bus_8131_0;
- /* 8111 */
- dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
- if (dev) {
- bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0);
- }
-
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
- }
-
- /* 8132-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
- }
-
+ /* 8111 */
+ dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn, 0));
+ if (dev) {
+ bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:03.0, using defaults\n",
+ bus_8111_0);
+ }
+
+ /* 8131-1 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_8131_0);
+ }
+
+ /* 8132-2 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3 + 1, 0));
+ if (dev) {
+ bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:02.0, using defaults\n",
+ bus_8131_0);
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -111,7 +111,7 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_8111 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
+ apicid_8111 = apicid_base + 0;
+ apicid_8131_1 = apicid_base + 1;
+ apicid_8131_2 = apicid_base + 2;
}
diff --git a/src/mainboard/tyan/s2885/get_bus_conf.c b/src/mainboard/tyan/s2885/get_bus_conf.c
index e390f7c106..88706c0bd5 100644
--- a/src/mainboard/tyan/s2885/get_bus_conf.c
+++ b/src/mainboard/tyan/s2885/get_bus_conf.c
@@ -19,15 +19,14 @@ unsigned char bus_8111_0 = 1;
unsigned char bus_8111_1 = 4;
unsigned char bus_8151_0 = 5;
unsigned char bus_8151_1 = 6;
-unsigned apicid_8111 ;
+unsigned apicid_8111;
unsigned apicid_8131_1;
unsigned apicid_8131_2;
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -35,8 +34,8 @@ unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
0x20202020,
// 0x20202020,
@@ -46,11 +45,10 @@ unsigned hcdnx[] =
// 0x20202020,
// 0x20202020,
};
+
unsigned sbdn3;
unsigned sbdn5;
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
@@ -58,20 +56,21 @@ void get_bus_conf(void)
unsigned apicid_base;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
sbdn3 = sysconf.hcdn[0] & 0xff;
@@ -80,43 +79,46 @@ void get_bus_conf(void)
bus_8131_0 = (sysconf.pci1234[0] >> 16) & 0xff;
bus_8111_0 = bus_8131_0;
- /* 8111 */
- dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
- if (dev) {
- bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0);
- }
-
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
- }
-
- /* 8132-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
- }
-
- /* HT chain 1 */
+ /* 8111 */
+ dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn, 0));
+ if (dev) {
+ bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:03.0, using defaults\n",
+ bus_8111_0);
+ }
+
+ /* 8131-1 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_8131_0);
+ }
+
+ /* 8132-2 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3 + 1, 0));
+ if (dev) {
+ bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:02.0, using defaults\n",
+ bus_8131_0);
+ }
+
+ /* HT chain 1 */
// it is on node0, so it must be there
bus_8151_0 = (sysconf.pci1234[1] >> 16) & 0xff;
- /* 8151 */
- dev = dev_find_slot(bus_8151_0, PCI_DEVFN(sbdn5+1, 0));
+ /* 8151 */
+ dev = dev_find_slot(bus_8151_0, PCI_DEVFN(sbdn5 + 1, 0));
- if (dev) {
- bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ if (dev) {
+ bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
// printk(BIOS_DEBUG, "bus_8151_1=%d\n",bus_8151_1);
- }
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -124,7 +126,7 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_8111 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
+ apicid_8111 = apicid_base + 0;
+ apicid_8131_1 = apicid_base + 1;
+ apicid_8131_2 = apicid_base + 2;
}
diff --git a/src/mainboard/tyan/s2891/get_bus_conf.c b/src/mainboard/tyan/s2891/get_bus_conf.c
index 6be68adbec..e94c608cc7 100644
--- a/src/mainboard/tyan/s2891/get_bus_conf.c
+++ b/src/mainboard/tyan/s2891/get_bus_conf.c
@@ -12,38 +12,36 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_ck804_0; //1
- unsigned char bus_ck804_1; //2
- unsigned char bus_ck804_2; //3
- unsigned char bus_ck804_3; //4
- unsigned char bus_ck804_4; //5
- unsigned char bus_ck804_5; //6
- unsigned char bus_8131_0; //7
- unsigned char bus_8131_1; //8
- unsigned char bus_8131_2; //9
- unsigned char bus_coproc_0;
- unsigned apicid_ck804;
- unsigned apicid_8131_1;
- unsigned apicid_8131_2;
-
-
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000000,
- 0x0000200,
- 0x0000100,
+unsigned char bus_ck804_0; //1
+unsigned char bus_ck804_1; //2
+unsigned char bus_ck804_2; //3
+unsigned char bus_ck804_3; //4
+unsigned char bus_ck804_4; //5
+unsigned char bus_ck804_5; //6
+unsigned char bus_8131_0; //7
+unsigned char bus_8131_1; //8
+unsigned char bus_8131_2; //9
+unsigned char bus_coproc_0;
+unsigned apicid_ck804;
+unsigned apicid_8131_1;
+unsigned apicid_8131_2;
+
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000000,
+ 0x0000200,
+ 0x0000100,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+ 0x20202020,
0x20202020,
0x20202020,
- 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -54,8 +52,6 @@ unsigned hcdnx[] =
unsigned sbdn3;
unsigned coprocdn;
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
@@ -64,93 +60,97 @@ void get_bus_conf(void)
unsigned apicid_base;
unsigned sbdn;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
sbdn = sysconf.sbdn;
- sbdn3 = (sysconf.hcdn[1] & 0xff); // first byte of second chain
+ sbdn3 = (sysconf.hcdn[1] & 0xff); // first byte of second chain
bus_ck804_0 = (sysconf.pci1234[0] >> 16) & 0xff;
-
- /* CK804 */
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09,0));
- if (dev) {
- bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_4++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x09);
-
- bus_ck804_1 = 2;
- bus_ck804_4 = 3;
- }
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d,0));
- if (dev) {
- bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_5++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n",sbdn + 0x0d);
-
- bus_ck804_5 = bus_ck804_4+1;
- }
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0));
- if (dev) {
- bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
- }
-
- bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_8131_2++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
-
- bus_8131_1 = bus_8131_0+1;
- bus_8131_2 = bus_8131_0+2;
- }
- /* 8131-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
-
- bus_8131_2 = bus_8131_1+1;
- }
-
- if(sysconf.pci1234[2] & 1) {
- bus_coproc_0 = (sysconf.pci1234[2] >> 16) & 0xff;
- coprocdn = (sysconf.hcdn[2] & 0xff);
- }
-
+ /* CK804 */
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09, 0));
+ if (dev) {
+ bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_4++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x09);
+
+ bus_ck804_1 = 2;
+ bus_ck804_4 = 3;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d, 0));
+ if (dev) {
+ bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_5++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0d);
+
+ bus_ck804_5 = bus_ck804_4 + 1;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0e, 0));
+ if (dev) {
+ bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0e);
+ }
+
+ bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
+ /* 8131-1 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_8131_2++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_1 = bus_8131_0 + 1;
+ bus_8131_2 = bus_8131_0 + 2;
+ }
+ /* 8131-2 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3 + 1, 0));
+ if (dev) {
+ bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:02.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_2 = bus_8131_1 + 1;
+ }
+
+ if (sysconf.pci1234[2] & 1) {
+ bus_coproc_0 = (sysconf.pci1234[2] >> 16) & 0xff;
+ coprocdn = (sysconf.hcdn[2] & 0xff);
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -158,7 +158,7 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_ck804 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
+ apicid_ck804 = apicid_base + 0;
+ apicid_8131_1 = apicid_base + 1;
+ apicid_8131_2 = apicid_base + 2;
}
diff --git a/src/mainboard/tyan/s2892/get_bus_conf.c b/src/mainboard/tyan/s2892/get_bus_conf.c
index 174632fa44..0ead854448 100644
--- a/src/mainboard/tyan/s2892/get_bus_conf.c
+++ b/src/mainboard/tyan/s2892/get_bus_conf.c
@@ -12,24 +12,23 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_ck804_0; //1
- unsigned char bus_ck804_1; //2
- unsigned char bus_ck804_2; //3
- unsigned char bus_ck804_3; //4
- unsigned char bus_ck804_4; //5
- unsigned char bus_ck804_5; //6
- unsigned char bus_8131_0; //7
- unsigned char bus_8131_1; //8
- unsigned char bus_8131_2; //9
- unsigned apicid_ck804;
- unsigned apicid_8131_1;
- unsigned apicid_8131_2;
-
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
+unsigned char bus_ck804_0; //1
+unsigned char bus_ck804_1; //2
+unsigned char bus_ck804_2; //3
+unsigned char bus_ck804_3; //4
+unsigned char bus_ck804_4; //5
+unsigned char bus_ck804_5; //6
+unsigned char bus_8131_0; //7
+unsigned char bus_8131_1; //8
+unsigned char bus_8131_2; //9
+unsigned apicid_ck804;
+unsigned apicid_8131_1;
+unsigned apicid_8131_2;
+
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -37,8 +36,8 @@ unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
0x20202020,
// 0x20202020,
@@ -51,8 +50,6 @@ unsigned hcdnx[] =
unsigned sbdn3;
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
@@ -61,89 +58,92 @@ void get_bus_conf(void)
unsigned apicid_base;
unsigned sbdn;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
sbdn = sysconf.sbdn;
- sbdn3 = (sysconf.hcdn[1] & 0xff); // first byte of second chain
+ sbdn3 = (sysconf.hcdn[1] & 0xff); // first byte of second chain
bus_ck804_0 = (sysconf.pci1234[0] >> 16) & 0xff;
-
- /* CK804 */
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09,0));
- if (dev) {
- bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_4++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x09);
-
- bus_ck804_1 = 2;
- bus_ck804_4 = 3;
- }
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d,0));
- if (dev) {
- bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_5++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n",sbdn + 0x0d);
-
- bus_ck804_5 = bus_ck804_4+1;
- }
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0));
- if (dev) {
- bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
- }
-
- bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_8131_2++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
-
- bus_8131_1 = bus_8131_0+1;
- bus_8131_2 = bus_8131_0+2;
- }
- /* 8131-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
-
- bus_8131_2 = bus_8131_1+1;
- }
-
-
+ /* CK804 */
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09, 0));
+ if (dev) {
+ bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_4++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x09);
+
+ bus_ck804_1 = 2;
+ bus_ck804_4 = 3;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d, 0));
+ if (dev) {
+ bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_5++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0d);
+
+ bus_ck804_5 = bus_ck804_4 + 1;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0e, 0));
+ if (dev) {
+ bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0e);
+ }
+
+ bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
+ /* 8131-1 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_8131_2++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_1 = bus_8131_0 + 1;
+ bus_8131_2 = bus_8131_0 + 2;
+ }
+ /* 8131-2 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3 + 1, 0));
+ if (dev) {
+ bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:02.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_2 = bus_8131_1 + 1;
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -151,7 +151,7 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_ck804 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
+ apicid_ck804 = apicid_base + 0;
+ apicid_8131_1 = apicid_base + 1;
+ apicid_8131_2 = apicid_base + 2;
}
diff --git a/src/mainboard/tyan/s2895/get_bus_conf.c b/src/mainboard/tyan/s2895/get_bus_conf.c
index abd6297b48..11b1bc211e 100644
--- a/src/mainboard/tyan/s2895/get_bus_conf.c
+++ b/src/mainboard/tyan/s2895/get_bus_conf.c
@@ -12,43 +12,42 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_ck804_0; //1
- unsigned char bus_ck804_1; //2
- unsigned char bus_ck804_2; //3
- unsigned char bus_ck804_3; //4
- unsigned char bus_ck804_4; //5
- unsigned char bus_ck804_5; //6
- unsigned char bus_8131_0; //7
- unsigned char bus_8131_1; //8
- unsigned char bus_8131_2; //9
- unsigned char bus_ck804b_0;//a
- unsigned char bus_ck804b_1;//b
- unsigned char bus_ck804b_2;//c
- unsigned char bus_ck804b_3;//d
- unsigned char bus_ck804b_4;//e
- unsigned char bus_ck804b_5;//f
- unsigned apicid_ck804;
- unsigned apicid_8131_1;
- unsigned apicid_8131_2;
- unsigned apicid_ck804b;
-
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
- 0x0000ff0,
+unsigned char bus_ck804_0; //1
+unsigned char bus_ck804_1; //2
+unsigned char bus_ck804_2; //3
+unsigned char bus_ck804_3; //4
+unsigned char bus_ck804_4; //5
+unsigned char bus_ck804_5; //6
+unsigned char bus_8131_0; //7
+unsigned char bus_8131_1; //8
+unsigned char bus_8131_2; //9
+unsigned char bus_ck804b_0; //a
+unsigned char bus_ck804b_1; //b
+unsigned char bus_ck804b_2; //c
+unsigned char bus_ck804b_3; //d
+unsigned char bus_ck804b_4; //e
+unsigned char bus_ck804b_5; //f
+unsigned apicid_ck804;
+unsigned apicid_8131_1;
+unsigned apicid_8131_2;
+unsigned apicid_ck804b;
+
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+ 0x20202020,
0x20202020,
0x20202020,
- 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -59,8 +58,6 @@ unsigned hcdnx[] =
unsigned sbdn3;
unsigned sbdnb;
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
@@ -69,92 +66,97 @@ void get_bus_conf(void)
unsigned apicid_base;
unsigned sbdn;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
sbdn = sysconf.sbdn;
sbdn3 = (sysconf.hcdn[1] & 0xff);
- sbdnb = (sysconf.hcdn[2] & 0xff); // first byte of second chain
+ sbdnb = (sysconf.hcdn[2] & 0xff); // first byte of second chain
bus_ck804_0 = (sysconf.pci1234[0] >> 16) & 0xff;
- /* CK804 */
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09,0));
- if (dev) {
- bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_5++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x09);
-
- bus_ck804_1 = 2;
- bus_ck804_5 = 3;
- }
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0));
- if (dev) {
- bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
- }
-
- bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_8131_2++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
-
- bus_8131_1 = bus_8131_0+1;
- bus_8131_2 = bus_8131_0+2;
- }
- /* 8131-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
-
- bus_8131_2 = bus_8131_1+1;
- }
-
- /* CK804b */
-
- if(sysconf.pci1234[2] & 0x0f) { //if the second cpu is installed
- bus_ck804b_0 = (sysconf.pci1234[2]>>16) & 0xff;
-
- dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0e,0));
- if (dev) {
- bus_ck804b_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_ck804b_0,sbdnb+0x0e);
- bus_ck804b_5 = bus_ck804b_4+1;
- }
+ /* CK804 */
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09, 0));
+ if (dev) {
+ bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_5++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x09);
+
+ bus_ck804_1 = 2;
+ bus_ck804_5 = 3;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0e, 0));
+ if (dev) {
+ bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0e);
}
+ bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
+ /* 8131-1 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_8131_2++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_1 = bus_8131_0 + 1;
+ bus_8131_2 = bus_8131_0 + 2;
+ }
+ /* 8131-2 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:02.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_2 = bus_8131_1 + 1;
+ }
+
+ /* CK804b */
+
+ if (sysconf.pci1234[2] & 0x0f) { //if the second cpu is installed
+ bus_ck804b_0 = (sysconf.pci1234[2] >> 16) & 0xff;
+
+ dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0e, 0));
+ if (dev) {
+ bus_ck804b_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ bus_ck804b_0, sbdnb + 0x0e);
+ bus_ck804b_5 = bus_ck804b_4 + 1;
+ }
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -162,8 +164,8 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_ck804 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
- apicid_ck804b = apicid_base+3;
+ apicid_ck804 = apicid_base + 0;
+ apicid_8131_1 = apicid_base + 1;
+ apicid_8131_2 = apicid_base + 2;
+ apicid_ck804b = apicid_base + 3;
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-16 20:06:31 +0000