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-rw-r--r--src/mainboard/tyan/s2735/romstage.c20
-rw-r--r--src/mainboard/tyan/s2850/romstage.c2
-rw-r--r--src/mainboard/tyan/s2875/romstage.c2
-rw-r--r--src/mainboard/tyan/s2880/romstage.c2
-rw-r--r--src/mainboard/tyan/s2881/romstage.c2
-rw-r--r--src/mainboard/tyan/s2882/romstage.c2
-rw-r--r--src/mainboard/tyan/s2885/romstage.c2
-rw-r--r--src/mainboard/tyan/s2891/romstage.c2
-rw-r--r--src/mainboard/tyan/s2912/ap_romstage.c2
-rw-r--r--src/mainboard/tyan/s2912/romstage.c8
-rw-r--r--src/mainboard/tyan/s4880/romstage.c8
-rw-r--r--src/mainboard/tyan/s4882/romstage.c8
12 files changed, 30 insertions, 30 deletions
diff --git a/src/mainboard/tyan/s2735/romstage.c b/src/mainboard/tyan/s2735/romstage.c
index 74d043b04a..b9a566ef11 100644
--- a/src/mainboard/tyan/s2735/romstage.c
+++ b/src/mainboard/tyan/s2735/romstage.c
@@ -129,9 +129,9 @@ void amd64_main(unsigned long bist)
: "=a" (v_esp)
);
#if CONFIG_USE_PRINTK_IN_CAR
- printk(BIOS_DEBUG, "v_esp=%08x\r\n", v_esp);
+ printk(BIOS_DEBUG, "v_esp=%08x\n", v_esp);
#else
- print_debug("v_esp="); print_debug_hex32(v_esp); print_debug("\r\n");
+ print_debug("v_esp="); print_debug_hex32(v_esp); print_debug("\n");
#endif
}
@@ -141,9 +141,9 @@ void amd64_main(unsigned long bist)
cpu_reset_x:
#if CONFIG_USE_PRINTK_IN_CAR
- printk(BIOS_DEBUG, "cpu_reset = %08x\r\n",cpu_reset);
+ printk(BIOS_DEBUG, "cpu_reset = %08x\n",cpu_reset);
#else
- print_debug("cpu_reset = "); print_debug_hex32(cpu_reset); print_debug("\r\n");
+ print_debug("cpu_reset = "); print_debug_hex32(cpu_reset); print_debug("\n");
#endif
if(cpu_reset == 0) {
@@ -184,21 +184,21 @@ cpu_reset_x:
/* We can not go back any more, we lost old stack data in cache as ram*/
if(new_cpu_reset==0) {
- print_debug("Use Ram as Stack now - done\r\n");
+ print_debug("Use Ram as Stack now - done\n");
} else
{
- print_debug("Use Ram as Stack now - \r\n");
+ print_debug("Use Ram as Stack now - \n");
}
#if CONFIG_USE_PRINTK_IN_CAR
- printk(BIOS_DEBUG, "new_cpu_reset = %08x\r\n", new_cpu_reset);
+ printk(BIOS_DEBUG, "new_cpu_reset = %08x\n", new_cpu_reset);
#else
- print_debug("new_cpu_reset = "); print_debug_hex32(new_cpu_reset); print_debug("\r\n");
+ print_debug("new_cpu_reset = "); print_debug_hex32(new_cpu_reset); print_debug("\n");
#endif
#ifdef DEACTIVATE_CAR
print_debug("Deactivating CAR");
#include DEACTIVATE_CAR_FILE
- print_debug(" - Done.\r\n");
+ print_debug(" - Done.\n");
#endif
/*copy and execute coreboot_ram */
copy_and_run(new_cpu_reset);
@@ -206,7 +206,7 @@ cpu_reset_x:
}
#endif
- print_debug("should not be here -\r\n");
+ print_debug("should not be here -\n");
}
diff --git a/src/mainboard/tyan/s2850/romstage.c b/src/mainboard/tyan/s2850/romstage.c
index 3dfc851460..c251e6dcec 100644
--- a/src/mainboard/tyan/s2850/romstage.c
+++ b/src/mainboard/tyan/s2850/romstage.c
@@ -144,7 +144,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset |= ht_setup_chains_x();
if (needs_reset) {
- print_info("ht reset -\r\n");
+ print_info("ht reset -\n");
soft_reset();
}
diff --git a/src/mainboard/tyan/s2875/romstage.c b/src/mainboard/tyan/s2875/romstage.c
index ee5c659ad8..348083b67b 100644
--- a/src/mainboard/tyan/s2875/romstage.c
+++ b/src/mainboard/tyan/s2875/romstage.c
@@ -143,7 +143,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset |= ht_setup_chains_x();
if (needs_reset) {
- print_info("ht reset -\r\n");
+ print_info("ht reset -\n");
soft_reset();
}
diff --git a/src/mainboard/tyan/s2880/romstage.c b/src/mainboard/tyan/s2880/romstage.c
index 13e5305eea..9d092d8050 100644
--- a/src/mainboard/tyan/s2880/romstage.c
+++ b/src/mainboard/tyan/s2880/romstage.c
@@ -145,7 +145,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset |= ht_setup_chains_x();
if (needs_reset) {
- print_info("ht reset -\r\n");
+ print_info("ht reset -\n");
soft_reset();
}
diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c
index 50593b83bf..bb13bb4246 100644
--- a/src/mainboard/tyan/s2881/romstage.c
+++ b/src/mainboard/tyan/s2881/romstage.c
@@ -154,7 +154,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset |= ht_setup_chains_x();
if (needs_reset) {
- print_info("ht reset -\r\n");
+ print_info("ht reset -\n");
soft_reset();
}
diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c
index 41da91c842..db1342f797 100644
--- a/src/mainboard/tyan/s2882/romstage.c
+++ b/src/mainboard/tyan/s2882/romstage.c
@@ -149,7 +149,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset |= ht_setup_chains_x();
if (needs_reset) {
- print_info("ht reset -\r\n");
+ print_info("ht reset -\n");
soft_reset();
}
diff --git a/src/mainboard/tyan/s2885/romstage.c b/src/mainboard/tyan/s2885/romstage.c
index 470b3e384a..0f1b09e20b 100644
--- a/src/mainboard/tyan/s2885/romstage.c
+++ b/src/mainboard/tyan/s2885/romstage.c
@@ -158,7 +158,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset |= ht_setup_chains_x();
if (needs_reset) {
- print_info("ht reset -\r\n");
+ print_info("ht reset -\n");
soft_reset();
}
diff --git a/src/mainboard/tyan/s2891/romstage.c b/src/mainboard/tyan/s2891/romstage.c
index 149c0c84fb..022fa7ecb0 100644
--- a/src/mainboard/tyan/s2891/romstage.c
+++ b/src/mainboard/tyan/s2891/romstage.c
@@ -169,7 +169,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset |= ck804_early_setup_x();
if (needs_reset) {
- printk(BIOS_INFO, "ht reset -\r\n");
+ printk(BIOS_INFO, "ht reset -\n");
soft_reset();
}
diff --git a/src/mainboard/tyan/s2912/ap_romstage.c b/src/mainboard/tyan/s2912/ap_romstage.c
index 7c9b43862c..a477b6891d 100644
--- a/src/mainboard/tyan/s2912/ap_romstage.c
+++ b/src/mainboard/tyan/s2912/ap_romstage.c
@@ -79,7 +79,7 @@ void hardwaremain(int ret_addr)
id = get_node_core_id_x();
//FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP
- print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n");
+ print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
train_ram(id.nodeid, sysinfo, sysinfox);
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index 0a07dfede8..85b5321ac8 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -211,7 +211,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
console_init();
printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1);
- print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n");
+ print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n");
#if CONFIG_MEM_TRAIN_SEQ == 1
set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram
@@ -237,7 +237,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
msr_t msr;
msr=rdmsr(0xc0010042);
- print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n");
+ print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
}
@@ -251,7 +251,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
msr_t msr;
msr=rdmsr(0xc0010042);
- print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n");
+ print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n");
}
#endif
@@ -262,7 +262,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
// fidvid change will issue one LDTSTOP and the HT change will be effective too
if (needs_reset) {
- print_info("ht reset -\r\n");
+ print_info("ht reset -\n");
soft_reset();
}
diff --git a/src/mainboard/tyan/s4880/romstage.c b/src/mainboard/tyan/s4880/romstage.c
index 430e547164..229db170dc 100644
--- a/src/mainboard/tyan/s4880/romstage.c
+++ b/src/mainboard/tyan/s4880/romstage.c
@@ -66,11 +66,11 @@ static inline void change_i2c_mux(unsigned device)
{
#define SMBUS_HUB 0x18
int ret;
- print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\r\n");
+ print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n");
ret = smbus_write_byte(SMBUS_HUB, 0x01, device);
- print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\r\n");
+ print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\n");
ret = smbus_write_byte(SMBUS_HUB, 0x03, 0);
- print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\r\n");
+ print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\n");
}
#endif
@@ -195,7 +195,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset |= ht_setup_chains_x();
if (needs_reset) {
- print_info("ht reset -\r\n");
+ print_info("ht reset -\n");
soft_reset();
}
diff --git a/src/mainboard/tyan/s4882/romstage.c b/src/mainboard/tyan/s4882/romstage.c
index 11c36cb698..d44203c090 100644
--- a/src/mainboard/tyan/s4882/romstage.c
+++ b/src/mainboard/tyan/s4882/romstage.c
@@ -70,14 +70,14 @@ static inline void change_i2c_mux(unsigned device)
{
#define SMBUS_HUB 0x18
int ret, i;
- print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\r\n");
+ print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n");
i=2;
do {
ret = smbus_write_byte(SMBUS_HUB, 0x01, device);
- print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\r\n");
+ print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\n");
} while ((ret!=0) && (i-->0));
ret = smbus_write_byte(SMBUS_HUB, 0x03, 0);
- print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\r\n");
+ print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\n");
}
#endif
@@ -178,7 +178,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset |= ht_setup_chains_x();
if (needs_reset) {
- print_info("ht reset -\r\n");
+ print_info("ht reset -\n");
soft_reset();
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 03:00:17 +0000