diff options
Diffstat (limited to 'src/mainboard/tyan')
-rw-r--r-- | src/mainboard/tyan/s2912/Kconfig | 4 | ||||
-rw-r--r-- | src/mainboard/tyan/s2912/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/tyan/s2912_fam10/Kconfig | 4 | ||||
-rw-r--r-- | src/mainboard/tyan/s2912_fam10/romstage.c | 2 |
4 files changed, 8 insertions, 4 deletions
diff --git a/src/mainboard/tyan/s2912/Kconfig b/src/mainboard/tyan/s2912/Kconfig index 4eadd39d1b..6258d93ea0 100644 --- a/src/mainboard/tyan/s2912/Kconfig +++ b/src/mainboard/tyan/s2912/Kconfig @@ -88,4 +88,8 @@ config IRQ_SLOT_COUNT int default 11 +config MCP55_PCI_E_X_0 + int + default 1 + endif # BOARD_TYAN_S2912 diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index 745c00081a..39be36a240 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -86,8 +86,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/dualcore/dualcore.c" -#define MCP55_PCI_E_X_0 1 - #define MCP55_MB_SETUP \ RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+37, 0x00, 0x44,/* GPIO38 PCI_REQ3 */ \ RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+38, 0x00, 0x44,/* GPIO39 PCI_GNT3 */ \ diff --git a/src/mainboard/tyan/s2912_fam10/Kconfig b/src/mainboard/tyan/s2912_fam10/Kconfig index a03176b2e3..30facb9782 100644 --- a/src/mainboard/tyan/s2912_fam10/Kconfig +++ b/src/mainboard/tyan/s2912_fam10/Kconfig @@ -105,4 +105,8 @@ config HEAP_SIZE hex default 0xc0000 +config MCP55_PCI_E_X_0 + int + default 1 + endif # BOARD_TYAN_S2912_FAM10 diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index a3ffff902e..49bcd1af8b 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -79,8 +79,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "cpu/amd/quadcore/quadcore.c" -#define MCP55_PCI_E_X_0 1 - #define MCP55_MB_SETUP \ RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+37, 0x00, 0x44,/* GPIO38 PCI_REQ3 */ \ RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+38, 0x00, 0x44,/* GPIO39 PCI_GNT3 */ \ |