diff options
Diffstat (limited to 'src/mainboard/via/epia/Options.lb')
| -rw-r--r-- | src/mainboard/via/epia/Options.lb | 143 |
1 files changed, 0 insertions, 143 deletions
diff --git a/src/mainboard/via/epia/Options.lb b/src/mainboard/via/epia/Options.lb deleted file mode 100644 index 466ffcc382..0000000000 --- a/src/mainboard/via/epia/Options.lb +++ /dev/null @@ -1,143 +0,0 @@ -uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL -uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL -uses CONFIG_CONSOLE_SERIAL8250 -uses CONFIG_TTYS0_BAUD -uses CONFIG_TTYS0_BASE -uses CONFIG_TTYS0_LCS -uses CONFIG_GENERATE_MP_TABLE -uses CONFIG_GENERATE_PIRQ_TABLE -uses CONFIG_USE_FALLBACK_IMAGE -uses CONFIG_HAVE_FALLBACK_BOOT -uses CONFIG_HAVE_HARD_RESET -uses CONFIG_UDELAY_IO -uses CONFIG_UDELAY_TSC -uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 -uses CONFIG_HAVE_OPTION_TABLE -uses CONFIG_USE_OPTION_TABLE -uses CONFIG_ROM_PAYLOAD -uses CONFIG_IRQ_SLOT_COUNT -uses CONFIG_MAINBOARD -uses CONFIG_MAINBOARD_VENDOR -uses CONFIG_MAINBOARD_PART_NUMBER -uses COREBOOT_EXTRA_VERSION -uses CONFIG_ARCH -uses CONFIG_FALLBACK_SIZE -uses CONFIG_STACK_SIZE -uses CONFIG_HEAP_SIZE -uses CONFIG_ROM_SIZE -uses CONFIG_ROM_SECTION_SIZE -uses CONFIG_ROM_IMAGE_SIZE -uses CONFIG_ROM_SECTION_SIZE -uses CONFIG_ROM_SECTION_OFFSET -uses CONFIG_COMPRESSED_PAYLOAD_LZMA -uses CONFIG_PRECOMPRESSED_PAYLOAD -uses CONFIG_ROMBASE -uses CONFIG_RAMBASE -uses CONFIG_XIP_ROM_SIZE -uses CONFIG_XIP_ROM_BASE -uses CONFIG_GENERATE_MP_TABLE -uses CONFIG_CROSS_COMPILE -uses CC -uses HOSTCC -uses CONFIG_OBJCOPY - -# logging -uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL -uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL - -# logging -uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL -uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL - -uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - -default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1019 - -default CONFIG_CONSOLE_SERIAL8250=1 -## Select the serial console baud rate -default CONFIG_TTYS0_BAUD=115200 - -# Select the serial console base port -default CONFIG_TTYS0_BASE=0x3f8 - -# Select the serial protocol -# This defaults to 8 data bits, 1 stop bit, and no parity -default CONFIG_TTYS0_LCS=0x3 - -## CONFIG_ROM_SIZE is the size of boot ROM that this board will use. -default CONFIG_ROM_SIZE = 256*1024 - -### -### Build options -### - -## -## Build code for the fallback boot -## -default CONFIG_HAVE_FALLBACK_BOOT=1 - -## -## no MP table -## -default CONFIG_GENERATE_MP_TABLE=0 - -## -## Build code to reset the motherboard from coreboot -## -default CONFIG_HAVE_HARD_RESET=0 - -## -## use io based udelay function -## disable IO and enable TSC on Nehemiah boards -## -default CONFIG_UDELAY_IO=1 -default CONFIG_UDELAY_TSC=0 -default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0 - -## -## Build code to export a programmable irq routing table -## -default CONFIG_GENERATE_PIRQ_TABLE=1 -default CONFIG_IRQ_SLOT_COUNT=5 -#object irq_tables.o - -## -## Build code to export a CMOS option table -## -default CONFIG_HAVE_OPTION_TABLE=1 - -### -### coreboot layout values -### - -## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy. -default CONFIG_ROM_IMAGE_SIZE = 65536 -default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE - -## -## Use a small 8K stack -## -default CONFIG_STACK_SIZE=0x2000 - -## -## Use a small 16K heap -## -default CONFIG_HEAP_SIZE=0x4000 - -## -## Only use the option table in a normal image -## -#default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE -default CONFIG_USE_OPTION_TABLE = 0 - -default CONFIG_RAMBASE = 0x00004000 - -default CONFIG_ROM_PAYLOAD = 1 - -## -## The default compiler -## -default CONFIG_CROSS_COMPILE="" -default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" -default HOSTCC="gcc" -end |