summaryrefslogtreecommitdiff
path: root/src/mainboard/via/pc2500e
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/via/pc2500e')
-rw-r--r--src/mainboard/via/pc2500e/Kconfig11
-rw-r--r--src/mainboard/via/pc2500e/romstage.c2
2 files changed, 1 insertions, 12 deletions
diff --git a/src/mainboard/via/pc2500e/Kconfig b/src/mainboard/via/pc2500e/Kconfig
index 90afe97bf1..a23ec454cd 100644
--- a/src/mainboard/via/pc2500e/Kconfig
+++ b/src/mainboard/via/pc2500e/Kconfig
@@ -5,7 +5,6 @@ config BOARD_VIA_PC2500E
select NORTHBRIDGE_VIA_CN700
select SOUTHBRIDGE_VIA_VT8237R
select SUPERIO_ITE_IT8716F
- select ROMCC
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select SMP
@@ -22,16 +21,6 @@ config MAINBOARD_PART_NUMBER
default "pc2500e"
depends on BOARD_VIA_PC2500E
-config DCACHE_RAM_BASE
- hex
- default 0xc0000
- depends on BOARD_VIA_PC2500E
-
-config DCACHE_RAM_SIZE
- hex
- default 0x1000
- depends on BOARD_VIA_PC2500E
-
config RAMBASE
hex
default 0x4000
diff --git a/src/mainboard/via/pc2500e/romstage.c b/src/mainboard/via/pc2500e/romstage.c
index 71ad25908a..c0b34ab153 100644
--- a/src/mainboard/via/pc2500e/romstage.c
+++ b/src/mainboard/via/pc2500e/romstage.c
@@ -58,7 +58,7 @@ static const struct mem_controller ctrl = {
.channel0 = { 0x50 }, /* TODO: CN700 currently only supports 1 DIMM. */
};
-static void main(unsigned long bist)
+void main(unsigned long bist)
{
/* Enable multifunction for northbridge. */
pci_write_config8(ctrl.d0f0, 0x4f, 0x01);