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-rw-r--r--src/mainboard/asus/m2n-e/romstage.c11
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/romstage.c10
-rw-r--r--src/mainboard/gigabyte/m57sli/romstage.c11
-rw-r--r--src/mainboard/via/pc2500e/romstage.c2
4 files changed, 16 insertions, 18 deletions
diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c
index 2f3baf6ef7..6892b287bb 100644
--- a/src/mainboard/asus/m2n-e/romstage.c
+++ b/src/mainboard/asus/m2n-e/romstage.c
@@ -37,14 +37,14 @@
#include <spd.h>
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "superio/ite/it8716f/early_serial.c"
-#include "superio/ite/it8716f/early_init.c"
+#include <superio/ite/it8716f/it8716f.h>
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)
+#define CLKIN_DEV PNP_DEV(0x2e, IT8716F_GPIO)
static void memreset(int controllers, const struct mem_controller *ctrl) {}
static inline void activate_spd_rom(const struct mem_controller *ctrl) {}
@@ -104,11 +104,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
if (bist == 0)
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
- /* FIXME: This should be part of the Super I/O code/config. */
- pnp_enter_ext_func_mode(SERIAL_DEV);
- pnp_write_config(SERIAL_DEV, 0x23, 0x01); /* CLKIN = 24MHz */
- it8716f_enable_dev(SERIAL_DEV, CONFIG_TTYS0_BASE);
- pnp_exit_ext_func_mode(SERIAL_DEV);
+ it8716f_conf_clkin(CLKIN_DEV, IT8716F_UART_CLK_PREDIVIDE_24);
+ it8716f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
setup_mb_resource_map();
report_bist_failure(bist);
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
index 4d215ae695..86158c8853 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
@@ -38,14 +38,14 @@
#include "lib/delay.c"
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "superio/ite/it8716f/early_serial.c"
-#include "superio/ite/it8716f/early_init.c"
+#include <superio/ite/it8716f/it8716f.h>
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "southbridge/sis/sis966/early_ctrl.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)
+#define CLKIN_DEV PNP_DEV(0x2e, IT8716F_GPIO)
static void memreset(int controllers, const struct mem_controller *ctrl) { }
static void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -125,10 +125,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
if (bist == 0)
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
- pnp_enter_ext_func_mode(SERIAL_DEV);
- pnp_write_config(SERIAL_DEV, 0x23, 0);
- it8716f_enable_dev(SERIAL_DEV, CONFIG_TTYS0_BASE);
- pnp_exit_ext_func_mode(SERIAL_DEV);
+ it8716f_conf_clkin(CLKIN_DEV, IT8716F_UART_CLK_PREDIVIDE_48);
+ it8716f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
setup_mb_resource_map();
diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index 77eae09391..44dda27c57 100644
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -35,15 +35,14 @@
#include "lib/delay.c"
#include "cpu/x86/lapic.h"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "superio/ite/it8716f/early_serial.c"
-#include "superio/ite/it8716f/early_init.c"
+#include <superio/ite/it8716f/it8716f.h>
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "southbridge/nvidia/mcp55/early_ctrl.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)
-#define GPIO_DEV PNP_DEV(0x2e, IT8716F_GPIO)
+#define CLKIN_DEV PNP_DEV(0x2e, IT8716F_GPIO)
static void memreset(int controllers, const struct mem_controller *ctrl) { }
static void activate_spd_rom(const struct mem_controller *ctrl) { }
@@ -106,7 +105,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
struct sys_info *sysinfo = &sysinfo_car;
int needs_reset = 0;
unsigned bsp_apicid = 0;
- uint8_t tmp = 0;
if (!cpu_init_detectedx && boot_cpu()) {
/* Nothing special needs to be done to find bus 0 */
@@ -118,6 +116,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
if (bist == 0)
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
+#if 0
+ uint8_t tmp = 0;
pnp_enter_ext_func_mode(SERIAL_DEV);
/* The following line will set CLKIN to 24 MHz, external */
pnp_write_config(SERIAL_DEV, IT8716F_CONFIG_REG_CLOCKSEL, 0x11);
@@ -132,6 +132,9 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
it8716f_enable_dev(SERIAL_DEV, CONFIG_TTYS0_BASE);
pnp_exit_ext_func_mode(SERIAL_DEV);
+#endif
+ it8716f_conf_clkin(CLKIN_DEV, IT8716F_UART_CLK_PREDIVIDE_48);
+ it8716f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
setup_mb_resource_map();
diff --git a/src/mainboard/via/pc2500e/romstage.c b/src/mainboard/via/pc2500e/romstage.c
index 0728154735..e374cf93b7 100644
--- a/src/mainboard/via/pc2500e/romstage.c
+++ b/src/mainboard/via/pc2500e/romstage.c
@@ -32,7 +32,7 @@
#include "drivers/pc80/udelay_io.c"
#include "lib/delay.c"
#include "southbridge/via/vt8237r/early_smbus.c"
-#include "superio/ite/it8716f/early_serial.c"
+#include <superio/ite/it8716f/it8716f.h>
#include <spd.h>
#define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)