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-rw-r--r--src/mainboard/amd/rumba/chip.h2
-rw-r--r--src/mainboard/amd/rumba/mainboard.c31
-rw-r--r--src/mainboard/olpc/rev_a/Config.lb1
3 files changed, 33 insertions, 1 deletions
diff --git a/src/mainboard/amd/rumba/chip.h b/src/mainboard/amd/rumba/chip.h
index 90cfe88a93..40efbfa698 100644
--- a/src/mainboard/amd/rumba/chip.h
+++ b/src/mainboard/amd/rumba/chip.h
@@ -1,5 +1,5 @@
extern struct chip_operations mainboard_amd_rumba_ops;
struct mainboard_amd_rumba_config {
- int nothing;
+ int nicirq;
};
diff --git a/src/mainboard/amd/rumba/mainboard.c b/src/mainboard/amd/rumba/mainboard.c
index 133d38fd30..614b87154c 100644
--- a/src/mainboard/amd/rumba/mainboard.c
+++ b/src/mainboard/amd/rumba/mainboard.c
@@ -6,7 +6,38 @@
#include <arch/io.h>
#include "chip.h"
+static void init(struct device *dev) {
+ struct mainboard_amd_rumba_config *mainboard = (struct mainboard_amd_rumba_config*)dev->chip_info;
+ device_t nic = NULL;
+ unsigned bus = 0;
+ unsigned devfn = PCI_DEVFN(0xd, 0);
+ int nicirq = 1;
+
+ if (mainboard->nicirq)
+ nicirq = mainboard->nicirq;
+
+ printk_debug("AMD RUMBA ENTER %s\n", __FUNCTION__);
+
+ if (nicirq) {
+ printk_debug("%s (%x,%x)SET PCI interrupt line to %d\n",
+ __FUNCTION__, bus, devfn, nicirq);
+ nic = dev_find_slot(bus, devfn);
+ if (! nic){
+ printk_err("Could not find NIC\n");
+ } else {
+ pci_write_config8(nic, PCI_INTERRUPT_LINE, nicirq);
+ }
+ }
+ printk_debug("AMD RUMBA EXIT %s\n", __FUNCTION__);
+}
+
+static void enable_dev(struct device *dev)
+{
+ dev->ops->init = init;
+}
+
struct chip_operations mainboard_amd_rumba_ops = {
CHIP_NAME("AMD Rumba mainboard ")
+ .enable_dev = enable_dev,
};
diff --git a/src/mainboard/olpc/rev_a/Config.lb b/src/mainboard/olpc/rev_a/Config.lb
index a7962f51d0..8c5d98388a 100644
--- a/src/mainboard/olpc/rev_a/Config.lb
+++ b/src/mainboard/olpc/rev_a/Config.lb
@@ -133,6 +133,7 @@ chip northbridge/amd/gx2
device pci 1.0 on end
device pci 1.1 on end
chip southbridge/amd/cs5536
+ register "enable_gpio0_inta" = "1"
device pci d.0 on end # Realtek 8139 LAN
device pci f.0 on end # ISA Bridge
device pci f.2 on end # IDE Controller