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-rw-r--r--src/mainboard/intel/bayleybay_fsp/devicetree.cb20
-rw-r--r--src/mainboard/intel/minnowmax/devicetree.cb20
2 files changed, 20 insertions, 20 deletions
diff --git a/src/mainboard/intel/bayleybay_fsp/devicetree.cb b/src/mainboard/intel/bayleybay_fsp/devicetree.cb
index 356c8df5f3..a19a676804 100644
--- a/src/mainboard/intel/bayleybay_fsp/devicetree.cb
+++ b/src/mainboard/intel/bayleybay_fsp/devicetree.cb
@@ -24,16 +24,16 @@ chip soc/intel/fsp_baytrail
register "fadt_boot_arch" = "ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042"
#### FSP register settings ####
- register "SataMode" = "SATA_MODE_AHCI"
- register "MrcInitSPDAddr1" = "SPD_ADDR_DEFAULT"
- register "MrcInitSPDAddr2" = "SPD_ADDR_DEFAULT"
- register "MrcInitTsegSize" = "TSEG_SIZE_8_MB"
- register "MrcInitMmioSize" = "MMIO_SIZE_DEFAULT"
- register "eMMCBootMode" = "EMMC_FOLLOWS_DEVICETREE"
- register "IgdDvmt50PreAlloc" = "IGD_MEMSIZE_DEFAULT"
- register "ApertureSize" = "APERTURE_SIZE_DEFAULT"
- register "GttSize" = "GTT_SIZE_DEFAULT"
- register "LpssSioEnablePciMode" = "LPSS_PCI_MODE_DEFAULT"
+ register "PcdSataMode" = "SATA_MODE_AHCI"
+ register "PcdMrcInitSPDAddr1" = "SPD_ADDR_DEFAULT"
+ register "PcdMrcInitSPDAddr2" = "SPD_ADDR_DEFAULT"
+ register "PcdMrcInitTsegSize" = "TSEG_SIZE_8_MB"
+ register "PcdMrcInitMmioSize" = "MMIO_SIZE_DEFAULT"
+ register "PcdeMMCBootMode" = "EMMC_FOLLOWS_DEVICETREE"
+ register "PcdIgdDvmt50PreAlloc" = "IGD_MEMSIZE_DEFAULT"
+ register "PcdApertureSize" = "APERTURE_SIZE_DEFAULT"
+ register "PcdGttSize" = "GTT_SIZE_DEFAULT"
+ register "PcdLpssSioEnablePciMode" = "LPSS_PCI_MODE_DEFAULT"
register "AzaliaAutoEnable" = "AZALIA_FOLLOWS_DEVICETREE"
register "LpeAcpiModeEnable" = "LPE_ACPI_MODE_DISABLED"
diff --git a/src/mainboard/intel/minnowmax/devicetree.cb b/src/mainboard/intel/minnowmax/devicetree.cb
index a0ac7ae74a..dd999a09e0 100644
--- a/src/mainboard/intel/minnowmax/devicetree.cb
+++ b/src/mainboard/intel/minnowmax/devicetree.cb
@@ -24,16 +24,16 @@ chip soc/intel/fsp_baytrail
register "fadt_boot_arch" = "ACPI_FADT_LEGACY_FREE"
#### FSP register settings ####
- register "SataMode" = "SATA_MODE_AHCI"
- register "MrcInitSPDAddr1" = "SPD_ADDR_DEFAULT"
- register "MrcInitSPDAddr2" = "SPD_ADDR_DEFAULT"
- register "MrcInitTsegSize" = "TSEG_SIZE_8_MB"
- register "MrcInitMmioSize" = "MMIO_SIZE_DEFAULT"
- register "eMMCBootMode" = "EMMC_FOLLOWS_DEVICETREE"
- register "IgdDvmt50PreAlloc" = "IGD_MEMSIZE_DEFAULT"
- register "ApertureSize" = "APERTURE_SIZE_DEFAULT"
- register "GttSize" = "GTT_SIZE_DEFAULT"
- register "LpssSioEnablePciMode" = "LPSS_PCI_MODE_DEFAULT"
+ register "PcdSataMode" = "SATA_MODE_AHCI"
+ register "PcdMrcInitSPDAddr1" = "SPD_ADDR_DEFAULT"
+ register "PcdMrcInitSPDAddr2" = "SPD_ADDR_DEFAULT"
+ register "PcdMrcInitTsegSize" = "TSEG_SIZE_8_MB"
+ register "PcdMrcInitMmioSize" = "MMIO_SIZE_DEFAULT"
+ register "PcdeMMCBootMode" = "EMMC_FOLLOWS_DEVICETREE"
+ register "PcdIgdDvmt50PreAlloc" = "IGD_MEMSIZE_DEFAULT"
+ register "PcdApertureSize" = "APERTURE_SIZE_DEFAULT"
+ register "PcdGttSize" = "GTT_SIZE_DEFAULT"
+ register "PcdLpssSioEnablePciMode" = "LPSS_PCI_MODE_DEFAULT"
register "AzaliaAutoEnable" = "AZALIA_FOLLOWS_DEVICETREE"
register "LpeAcpiModeEnable" = "LPE_ACPI_MODE_DISABLED"