diff options
Diffstat (limited to 'src/mainboard')
47 files changed, 62 insertions, 179 deletions
diff --git a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c index 76ce93bf07..a1e6d99e4d 100644 --- a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c +++ b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c @@ -37,6 +37,7 @@ #define SMBUS_HUB 0x71 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -54,10 +55,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/amd/pistachio/cache_as_ram_auto.c b/src/mainboard/amd/pistachio/cache_as_ram_auto.c index c348a61f9d..5aaf399583 100644 --- a/src/mainboard/amd/pistachio/cache_as_ram_auto.c +++ b/src/mainboard/amd/pistachio/cache_as_ram_auto.c @@ -31,6 +31,7 @@ #define DIMM1 0x51 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -48,10 +49,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/amd/serengeti_cheetah/apc_auto.c b/src/mainboard/amd/serengeti_cheetah/apc_auto.c index 63a8a085eb..584309508e 100644 --- a/src/mainboard/amd/serengeti_cheetah/apc_auto.c +++ b/src/mainboard/amd/serengeti_cheetah/apc_auto.c @@ -21,12 +21,15 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" #include "pc80/serial.c" +#include "./arch/i386/lib/printk_init.c" #if CONFIG_USE_INIT == 0 #include "lib/memcpy.c" #endif #include "arch/i386/lib/console.c" +#include "lib/uart8250.c" +#include "console/vtxprintf.c" #if 0 static void post_code(uint8_t value) { diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c index 7e60c2c7a1..0df32db32c 100644 --- a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c +++ b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c @@ -24,6 +24,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -63,9 +64,6 @@ static void post_code(uint8_t value) { #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb index 235f1c71a0..c06453c700 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb +++ b/src/mainboard/amd/serengeti_cheetah_fam10/Options.lb @@ -136,7 +136,7 @@ default ROM_SIZE=524288 #FALLBACK: 512K - 4K default FALLBACK_SIZE=0x7f000 #FAILOVER: 4k -default FAILOVER_SIZE=0x01000 +default FAILOVER_SIZE=0x02000 #more 1M for pgtbl #if there is RAM on node0, we need to set it to 32M, otherwise can not access CAR on node0, and RAM on node1 at same time. diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c index d7b2379c24..38196b262e 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c @@ -45,6 +45,7 @@ #define FAM10_SET_FIDVID_CORE_RANGE 0 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -81,10 +82,6 @@ int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, #if (USE_FAILOVER_IMAGE == 0) - #if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" - #endif - #include "northbridge/amd/amdfam10/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" diff --git a/src/mainboard/arima/hdama/cache_as_ram_auto.c b/src/mainboard/arima/hdama/cache_as_ram_auto.c index 438bc306bc..fe19502543 100644 --- a/src/mainboard/arima/hdama/cache_as_ram_auto.c +++ b/src/mainboard/arima/hdama/cache_as_ram_auto.c @@ -21,10 +21,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/asus/a8n_e/cache_as_ram_auto.c b/src/mainboard/asus/a8n_e/cache_as_ram_auto.c index 44f0bb3e96..1e02e6e0be 100644 --- a/src/mainboard/asus/a8n_e/cache_as_ram_auto.c +++ b/src/mainboard/asus/a8n_e/cache_as_ram_auto.c @@ -38,6 +38,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -54,10 +55,6 @@ /* Used by ck894_early_setup(). */ #define CK804_NUM 1 -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include <cpu/amd/model_fxx_rev.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" diff --git a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c b/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c index 8aeaff5fcb..0a8ca60a8b 100644 --- a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c +++ b/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c @@ -43,6 +43,7 @@ unsigned int get_sbdn(unsigned bus); /* #define DEBUG_SMBUS 1 */ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -56,9 +57,6 @@ unsigned int get_sbdn(unsigned bus); #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c b/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c index f640094711..ba3baacfd3 100644 --- a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c +++ b/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c @@ -47,6 +47,7 @@ unsigned int get_sbdn(unsigned bus); /* #define DEBUG_SMBUS 1 */ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -61,9 +62,6 @@ unsigned int get_sbdn(unsigned bus); #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/broadcom/blast/cache_as_ram_auto.c b/src/mainboard/broadcom/blast/cache_as_ram_auto.c index 1ecb79d90e..2a06555b76 100644 --- a/src/mainboard/broadcom/blast/cache_as_ram_auto.c +++ b/src/mainboard/broadcom/blast/cache_as_ram_auto.c @@ -11,6 +11,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -40,10 +41,6 @@ static void post_code(uint8_t value) { #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c b/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c index 6114aba2c4..f5c77ffee5 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c @@ -48,6 +48,7 @@ #define DBGP_DEFAULT 7 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -85,10 +86,6 @@ #include "cpu/x86/bist.h" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" diff --git a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c b/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c index fb52c86c24..5462c31891 100644 --- a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c +++ b/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c @@ -46,6 +46,7 @@ #define DBGP_DEFAULT 7 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -82,10 +83,6 @@ #include "cpu/x86/bist.h" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" diff --git a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c b/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c index 9befadffd2..c2269698e8 100644 --- a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c +++ b/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c @@ -51,6 +51,7 @@ #define DBGP_DEFAULT 7 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -87,10 +88,6 @@ #include "cpu/x86/bist.h" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" diff --git a/src/mainboard/ibm/e325/cache_as_ram_auto.c b/src/mainboard/ibm/e325/cache_as_ram_auto.c index e2002afa3b..98a5a99db9 100644 --- a/src/mainboard/ibm/e325/cache_as_ram_auto.c +++ b/src/mainboard/ibm/e325/cache_as_ram_auto.c @@ -2,6 +2,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -21,10 +22,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/ibm/e326/cache_as_ram_auto.c b/src/mainboard/ibm/e326/cache_as_ram_auto.c index 0c6b9b0418..872351323d 100644 --- a/src/mainboard/ibm/e326/cache_as_ram_auto.c +++ b/src/mainboard/ibm/e326/cache_as_ram_auto.c @@ -2,6 +2,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -21,10 +22,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c b/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c index a5cf536786..cb292bde7b 100644 --- a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c +++ b/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c @@ -24,6 +24,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -52,15 +53,6 @@ #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" - // TODO: This doesn't compile at the moment. Fix later. - // #if CONFIG_USE_PRINTK_IN_CAR == 1 - // #include "lib/uart8250.c" - // #include "console/vtxprintf.c" - // #include "arch/i386/lib/printk_init.c" - // #endif -#endif #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" diff --git a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c b/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c index 566ad419b4..6716a55825 100644 --- a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c +++ b/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c @@ -24,6 +24,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -52,15 +53,6 @@ #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" - // TODO: This doesn't compile at the moment. Fix later. - // #if CONFIG_USE_PRINTK_IN_CAR == 1 - // #include "lib/uart8250.c" - // #include "console/vtxprintf.c" - // #include "arch/i386/lib/printk_init.c" - // #endif -#endif #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" diff --git a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c b/src/mainboard/iwill/dk8x/cache_as_ram_auto.c index 566ad419b4..6716a55825 100644 --- a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c +++ b/src/mainboard/iwill/dk8x/cache_as_ram_auto.c @@ -24,6 +24,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -52,15 +53,6 @@ #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" - // TODO: This doesn't compile at the moment. Fix later. - // #if CONFIG_USE_PRINTK_IN_CAR == 1 - // #include "lib/uart8250.c" - // #include "console/vtxprintf.c" - // #include "arch/i386/lib/printk_init.c" - // #endif -#endif #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" diff --git a/src/mainboard/kontron/986lcd-m/auto.c b/src/mainboard/kontron/986lcd-m/auto.c index 9a202d46c3..06023e67af 100644 --- a/src/mainboard/kontron/986lcd-m/auto.c +++ b/src/mainboard/kontron/986lcd-m/auto.c @@ -23,6 +23,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <arch/io.h> #include <arch/romcc_io.h> #include <device/pci_def.h> @@ -45,10 +46,6 @@ #include "northbridge/intel/i945/udelay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1) #include "northbridge/intel/i945/ich7.h" diff --git a/src/mainboard/msi/ms7135/cache_as_ram_auto.c b/src/mainboard/msi/ms7135/cache_as_ram_auto.c index 74c5ccc014..eaeeeb16e5 100644 --- a/src/mainboard/msi/ms7135/cache_as_ram_auto.c +++ b/src/mainboard/msi/ms7135/cache_as_ram_auto.c @@ -38,6 +38,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -56,10 +57,6 @@ #define CK804_USE_NIC 1 #define CK804_USE_ACI 1 -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include <cpu/amd/model_fxx_rev.h> #include "pc80/serial.c" #include "arch/i386/lib/console.c" diff --git a/src/mainboard/msi/ms7260/cache_as_ram_auto.c b/src/mainboard/msi/ms7260/cache_as_ram_auto.c index 22b82ddedf..c9e429d5ca 100644 --- a/src/mainboard/msi/ms7260/cache_as_ram_auto.c +++ b/src/mainboard/msi/ms7260/cache_as_ram_auto.c @@ -50,6 +50,7 @@ #define DBGP_DEFAULT 7 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -84,9 +85,6 @@ #if USE_FAILOVER_IMAGE == 0 #include "cpu/x86/bist.h" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/msi/ms9185/cache_as_ram_auto.c b/src/mainboard/msi/ms9185/cache_as_ram_auto.c index 437394e24a..cd7a3d236d 100644 --- a/src/mainboard/msi/ms9185/cache_as_ram_auto.c +++ b/src/mainboard/msi/ms9185/cache_as_ram_auto.c @@ -47,6 +47,7 @@ #define DEBUG_SMBUS 1 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -75,10 +76,6 @@ static void post_code(uint8_t value) { #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" diff --git a/src/mainboard/msi/ms9282/cache_as_ram_auto.c b/src/mainboard/msi/ms9282/cache_as_ram_auto.c index 9754f3fc60..6e8760d4bc 100644 --- a/src/mainboard/msi/ms9282/cache_as_ram_auto.c +++ b/src/mainboard/msi/ms9282/cache_as_ram_auto.c @@ -41,6 +41,7 @@ #define DEBUG_SMBUS 1 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -57,10 +58,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/newisys/khepri/cache_as_ram_auto.c b/src/mainboard/newisys/khepri/cache_as_ram_auto.c index 1fb2fa88ff..6adb906e33 100644 --- a/src/mainboard/newisys/khepri/cache_as_ram_auto.c +++ b/src/mainboard/newisys/khepri/cache_as_ram_auto.c @@ -7,6 +7,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -37,10 +38,6 @@ static void post_code(uint8_t value) { #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c b/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c index 28434d3ab9..d2a357da3c 100644 --- a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c +++ b/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c @@ -46,6 +46,7 @@ #define DBGP_DEFAULT 7 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -82,10 +83,6 @@ #include "cpu/x86/bist.h" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" diff --git a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c index 3c167bbcf8..bac138cf1f 100644 --- a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c +++ b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c @@ -14,6 +14,7 @@ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -32,10 +33,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/supermicro/h8dme/apc_auto.c b/src/mainboard/supermicro/h8dme/apc_auto.c index 6e8f301626..099b6abd17 100644 --- a/src/mainboard/supermicro/h8dme/apc_auto.c +++ b/src/mainboard/supermicro/h8dme/apc_auto.c @@ -48,6 +48,9 @@ #endif #include "arch/i386/lib/console.c" +#include "lib/uart8250.c" +#include "console/vtxprintf.c" +#include "./arch/i386/lib/printk_init.c" #if 0 static void post_code(uint8_t value) { diff --git a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c index ed6be2c010..a71de8428c 100644 --- a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c +++ b/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c @@ -40,6 +40,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -75,10 +76,6 @@ #include "cpu/x86/bist.h" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" diff --git a/src/mainboard/supermicro/h8dmr/apc_auto.c b/src/mainboard/supermicro/h8dmr/apc_auto.c index 6e8f301626..099b6abd17 100644 --- a/src/mainboard/supermicro/h8dmr/apc_auto.c +++ b/src/mainboard/supermicro/h8dmr/apc_auto.c @@ -48,6 +48,9 @@ #endif #include "arch/i386/lib/console.c" +#include "lib/uart8250.c" +#include "console/vtxprintf.c" +#include "./arch/i386/lib/printk_init.c" #if 0 static void post_code(uint8_t value) { diff --git a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c index 43bd0b3859..c9b33877b8 100644 --- a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c +++ b/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c @@ -44,6 +44,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -79,10 +80,6 @@ #include "cpu/x86/bist.h" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" diff --git a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c b/src/mainboard/technexion/tim8690/cache_as_ram_auto.c index 6bb82f0bfd..503bc85495 100644 --- a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c +++ b/src/mainboard/technexion/tim8690/cache_as_ram_auto.c @@ -37,6 +37,7 @@ #define SMBUS_HUB 0x71 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -54,10 +55,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/tyan/s2735/cache_as_ram_auto.c b/src/mainboard/tyan/s2735/cache_as_ram_auto.c index 797ff62b80..8c4a0370e0 100644 --- a/src/mainboard/tyan/s2735/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2735/cache_as_ram_auto.c @@ -2,6 +2,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -27,10 +28,6 @@ static void post_code(uint8_t value) { #include "southbridge/intel/i82801er/i82801er_early_smbus.c" #include "northbridge/intel/e7501/raminit.h" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/intel/e7501/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" @@ -259,6 +256,11 @@ cpu_reset_x: print_debug("new_cpu_reset = "); print_debug_hex32(new_cpu_reset); print_debug("\r\n"); #endif +#ifdef CONFIG_DEACTIVATE_CAR + print_debug("Deactivating CAR"); +#include CONFIG_DEACTIVATE_CAR_FILE + print_debug(" - Done.\r\n"); +#endif /*copy and execute coreboot_ram */ copy_and_run(new_cpu_reset); /* We will not return */ diff --git a/src/mainboard/tyan/s2850/cache_as_ram_auto.c b/src/mainboard/tyan/s2850/cache_as_ram_auto.c index 318903d227..373e0a6192 100644 --- a/src/mainboard/tyan/s2850/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2850/cache_as_ram_auto.c @@ -2,6 +2,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -32,10 +33,6 @@ static void post_code(uint8_t value) { #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/tyan/s2875/cache_as_ram_auto.c b/src/mainboard/tyan/s2875/cache_as_ram_auto.c index 2611162714..893635b9f8 100644 --- a/src/mainboard/tyan/s2875/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2875/cache_as_ram_auto.c @@ -2,6 +2,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -21,10 +22,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/tyan/s2880/cache_as_ram_auto.c b/src/mainboard/tyan/s2880/cache_as_ram_auto.c index de4b4895f8..eb4bcae466 100644 --- a/src/mainboard/tyan/s2880/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2880/cache_as_ram_auto.c @@ -2,6 +2,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -22,10 +23,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/tyan/s2881/cache_as_ram_auto.c b/src/mainboard/tyan/s2881/cache_as_ram_auto.c index 1ced1c970d..0f853b8af1 100644 --- a/src/mainboard/tyan/s2881/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2881/cache_as_ram_auto.c @@ -8,6 +8,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -38,10 +39,6 @@ static void post_code(uint8_t value) { #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/tyan/s2882/cache_as_ram_auto.c b/src/mainboard/tyan/s2882/cache_as_ram_auto.c index a4b894cd0d..a249fa1a8d 100644 --- a/src/mainboard/tyan/s2882/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2882/cache_as_ram_auto.c @@ -2,6 +2,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -21,10 +22,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/tyan/s2885/cache_as_ram_auto.c b/src/mainboard/tyan/s2885/cache_as_ram_auto.c index 5d43c71f9a..711afbc645 100644 --- a/src/mainboard/tyan/s2885/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2885/cache_as_ram_auto.c @@ -2,6 +2,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -32,10 +33,6 @@ static void post_code(uint8_t value) { #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/tyan/s2891/cache_as_ram_auto.c b/src/mainboard/tyan/s2891/cache_as_ram_auto.c index 78a2bb1ac8..6cf98abeb5 100644 --- a/src/mainboard/tyan/s2891/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2891/cache_as_ram_auto.c @@ -9,6 +9,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -27,9 +28,6 @@ #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/tyan/s2892/cache_as_ram_auto.c b/src/mainboard/tyan/s2892/cache_as_ram_auto.c index f1a4bdb8a4..3147e99747 100644 --- a/src/mainboard/tyan/s2892/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2892/cache_as_ram_auto.c @@ -2,6 +2,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -21,10 +22,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/tyan/s2895/cache_as_ram_auto.c b/src/mainboard/tyan/s2895/cache_as_ram_auto.c index 0dcf7cc516..4d06456d36 100644 --- a/src/mainboard/tyan/s2895/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2895/cache_as_ram_auto.c @@ -12,6 +12,7 @@ #endif #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -47,10 +48,6 @@ #include "cpu/x86/bist.h" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" diff --git a/src/mainboard/tyan/s2912/cache_as_ram_auto.c b/src/mainboard/tyan/s2912/cache_as_ram_auto.c index cd0346b31c..7c387b9bd0 100644 --- a/src/mainboard/tyan/s2912/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2912/cache_as_ram_auto.c @@ -46,6 +46,7 @@ #define DBGP_DEFAULT 7 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -82,10 +83,6 @@ #include "cpu/x86/bist.h" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - #include "northbridge/amd/amdk8/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" diff --git a/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c b/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c index ae619e5827..8121d34bf7 100644 --- a/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c @@ -39,6 +39,7 @@ #define DBGP_DEFAULT 7 #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <device/pci_ids.h> #include <arch/io.h> @@ -78,10 +79,6 @@ static void post_code(u8 value) { #include "cpu/x86/bist.h" -#if CONFIG_USE_INIT == 0 - #include "lib/memcpy.c" -#endif - #include "northbridge/amd/amdfam10/debug.c" #include "cpu/amd/mtrr/amd_earlymtrr.c" diff --git a/src/mainboard/tyan/s4880/cache_as_ram_auto.c b/src/mainboard/tyan/s4880/cache_as_ram_auto.c index 2e8eb3bb48..d7226afcef 100644 --- a/src/mainboard/tyan/s4880/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s4880/cache_as_ram_auto.c @@ -2,6 +2,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -21,10 +22,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/tyan/s4882/cache_as_ram_auto.c b/src/mainboard/tyan/s4882/cache_as_ram_auto.c index e3b013bb55..cdc1d2645f 100644 --- a/src/mainboard/tyan/s4882/cache_as_ram_auto.c +++ b/src/mainboard/tyan/s4882/cache_as_ram_auto.c @@ -2,6 +2,7 @@ #define __ROMCC__ #include <stdint.h> +#include <string.h> #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> @@ -20,10 +21,6 @@ #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" -#if CONFIG_USE_INIT == 0 -#include "lib/memcpy.c" -#endif - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" diff --git a/src/mainboard/via/vt8454c/auto.c b/src/mainboard/via/vt8454c/auto.c index 1812fca139..a77943c9e1 100644 --- a/src/mainboard/via/vt8454c/auto.c +++ b/src/mainboard/via/vt8454c/auto.c @@ -119,6 +119,12 @@ static void main(unsigned long bist) sdram_set_registers(cx700); enable_shadow_ram(cx700); sdram_enable(cx700); + +#ifdef CONFIG_DEACTIVATE_CAR + print_debug("Deactivating CAR"); +#include CONFIG_DEACTIVATE_CAR_FILE + print_debug(" - Done.\r\n"); +#endif copy_and_run(0); } |