diff options
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/intel/glkrvp/Kconfig | 6 | ||||
| -rw-r--r-- | src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb | 36 | ||||
| -rw-r--r-- | src/mainboard/intel/glkrvp/variants/baseboard/gpio.c | 24 | ||||
| -rw-r--r-- | src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c | 17 |
4 files changed, 63 insertions, 20 deletions
diff --git a/src/mainboard/intel/glkrvp/Kconfig b/src/mainboard/intel/glkrvp/Kconfig index 782e85083a..56ab00b8a5 100644 --- a/src/mainboard/intel/glkrvp/Kconfig +++ b/src/mainboard/intel/glkrvp/Kconfig @@ -10,6 +10,9 @@ config BOARD_INTEL_BASEBOARD_GLKRVP select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select MAINBOARD_HAS_TPM2 + select DRIVERS_I2C_GENERIC + select DRIVERS_GENERIC_MAX98357A + select DRIVERS_I2C_DA7219 if BOARD_INTEL_BASEBOARD_GLKRVP @@ -75,6 +78,9 @@ config UART_FOR_CONSOLE config INCLUDE_NHLT_BLOBS bool "Include blobs for audio." + select NHLT_DMIC_4CH_16B + select NHLT_DA7219 + select NHLT_MAX98357 config IS_GLK_RVP_1 bool "Is this RVP1?" diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb index e8eb3f35ac..4b939473bd 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb @@ -80,8 +80,12 @@ chip soc/intel/apollolake register "gpe0_dw2" = "PMC_GPE_N_95_64" register "gpe0_dw3" = "PMC_GPE_NW_31_0" - # Enable I2C2 bus early for TPM access - register "i2c[2].early_init" = "1" + # Enable I2C0 for audio codec at 400kHz + register "i2c[0]" = "{ + .speed = I2C_SPEED_FAST, + .rise_time_ns = 104, + .fall_time_ns = 52, + }" # Minimum SLP S3 assertion width 28ms. register "slp_s3_assertion_width_usecs" = "28000" @@ -97,7 +101,13 @@ chip soc/intel/apollolake device pci 0d.1 on end # - PMC device pci 0d.2 on end # - SPI device pci 0d.3 on end # - Shared SRAM - device pci 0e.0 on end # - Audio + device pci 0e.0 on # - Audio + chip drivers/generic/max98357a + register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_160)" + register "sdmode_delay" = "5" + device generic 0 on end + end + end device pci 0f.0 on end # - Heci1 device pci 0f.1 on end # - Heci2 device pci 0f.2 on end # - Heci3 @@ -111,7 +121,25 @@ chip soc/intel/apollolake device pci 14.1 on end # - PCIe-B 1 Onboard M2 Slot(Wifi/BT) device pci 15.0 on end # - XHCI device pci 15.1 off end # - XDCI - device pci 16.0 on end # - I2C 0 + device pci 16.0 on # - I2C 0 + chip drivers/i2c/da7219 + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_20_IRQ)" + register "btn_cfg" = "50" + register "mic_det_thr" = "500" + register "jack_ins_deb" = "20" + register "jack_det_rate" = ""32ms_64ms"" + register "jack_rem_deb" = "1" + register "a_d_btn_thr" = "0xa" + register "d_b_btn_thr" = "0x16" + register "b_c_btn_thr" = "0x21" + register "c_mic_btn_thr" = "0x3e" + register "btn_avg" = "4" + register "adc_1bit_rpt" = "1" + register "micbias_lvl" = "2600" + register "mic_amp_in_sel" = ""diff"" + device i2c 1a on end + end + end device pci 16.1 off end # - I2C 1 device pci 16.2 off end # - I2C 2 device pci 16.3 off end # - I2C 3 diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c index 0560c7b074..bf70e11e9a 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c @@ -44,7 +44,7 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_17, 1, DEEP, UP_20K, TxDRxE, SAME),/*Ec-to-SOC CS Wake */ PAD_CFG_GPI_APIC_IOS(GPIO_18, UP_20K, DEEP, LEVEL, NONE, IGNORE, SAME),/* Touch Pad Interrupt */ PAD_CFG_GPI_APIC_IOS(GPIO_19, UP_20K, DEEP, EDGE_SINGLE, NONE, TxDRxE, SAME),/*PMIC Interrupt*/ - PAD_CFG_GPI_APIC_IOS(GPIO_20, NONE, DEEP, LEVEL, NONE, IGNORE, SAME),/* Audio Codec Interrupt*/ + PAD_CFG_GPI_APIC_IOS(GPIO_20, UP_20K, DEEP, LEVEL, INVERT, IGNORE, SAME),/* Audio Codec Interrupt*/ PAD_CFG_NF(GPIO_21, UP_20K, DEEP, NF2), /* CNV_MFUART2_RXD */ PAD_CFG_NF_IOSSTATE(GPIO_22, UP_20K, DEEP, NF2, TxDRxE), /* CNV_MFUART2_TXD */ PAD_CFG_NF(GPIO_23, UP_20K, DEEP, NF2), /* CNV_GNSS_PABLANKIt */ @@ -74,8 +74,8 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_47, UP_20K, DEEP, NF1, HIZCRx1, ENPU), /* DSI_I2C_SCL */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_48, UP_1K, DEEP, NF1), /* PMC_I2C_SDA */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_49, UP_1K, DEEP, NF1), /* PMC_I2C_SCL */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_50, UP_20K, DEEP, NF1, HIZCRx1, ENPU), /* LPSS_I2C0_SDA - Audio Codec*/ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_51, UP_20K, DEEP, NF1, HIZCRx1, ENPU), /* LPSS_I2C0_SCL - Audio Codec */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_50, UP_2K, DEEP, NF1, HIZCRx1, ENPU), /* LPSS_I2C0_SDA - Audio Codec*/ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_51, UP_2K, DEEP, NF1, HIZCRx1, ENPU), /* LPSS_I2C0_SCL - Audio Codec */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_52, UP_20K, DEEP, NF1, HIZCRx1, ENPU), /* LPSS_I2C1_SDA - NFC */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_53, UP_20K, DEEP, NF1, HIZCRx1, ENPU), /* LPSS_I2C1_SCL - NFC */ PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_54, UP_20K, DEEP, HIZCRx1, ENPU),/*LPSS_I2C2_SDA*/ @@ -190,20 +190,20 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_157, 1, DEEP, UP_20K, IGNORE, SAME),/*WWAN_Reset/dGPS Reset*/ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_158, 0, DEEP, DN_20K, IGNORE, SAME),/*NFC_DFU*/ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_159, 1, DEEP, UP_20K, TxDRxE, ENPD),/*NFC reset*/ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_160, 1, DEEP, UP_20K, IGNORE, SAME),/*MDSI reset*/ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_160, 0, DEEP, UP_20K, IGNORE, SAME),/*SD_MODE for spk*/ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_161, 1, DEEP, UP_20K, IGNORE, SAME),/*Touch panel reset*/ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_162, 1, DEEP, UP_20K, IGNORE, SAME),/*AVS_I2S1_BCLK*/ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_163, 1, DEEP, UP_20K, IGNORE, SAME),/*M.2 WiFi Reset*/ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_162, DN_20K, DEEP, NF1, HIZCRx1, SAME),/*AVS_I2S1_BCLK*/ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_163, DN_20K, DEEP, NF1, HIZCRx1, SAME),/*AVS_I2S1_WS_SYNC*/ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_164, 1, DEEP, UP_20K, TxDRxE, ENPD),/*Touch Panel Power Enable*/ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_165, 1, DEEP, UP_20K, IGNORE, SAME),/*WWAN PWR EN/Full card power off*/ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_165, DN_20K, DEEP, NF1, HIZCRx1, SAME),/*AVS_I2S1_SDO*/ /* AUDIO COMMUNITY GPIOS*/ - PAD_CFG_NF_IOSSTATE(GPIO_166, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_HDA_BCLK*/ - PAD_CFG_NF_IOSSTATE(GPIO_167, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_HDA_WS_SYNC*/ - PAD_CFG_NF_IOSSTATE(GPIO_168, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_HDA_SDI*/ - PAD_CFG_NF_IOSSTATE(GPIO_169, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_HDA_SDO*/ - PAD_CFG_NF_IOSSTATE(GPIO_170, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_HDA_RSTB*/ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_166, DN_20K, DEEP, NF2, HIZCRx1, SAME),/*AVS_I2S2_BCLK*/ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_167, DN_20K, DEEP, NF2, HIZCRx1, SAME),/*AVS_I2S2_WS_SYNC*/ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_168, DN_20K, DEEP, NF2, HIZCRx1, SAME),/* AVS_I2S2_SDI*/ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_169, DN_20K, DEEP, NF2, HIZCRx1, SAME),/*AVS_I2S2_SD0*/ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_170, DN_20K, DEEP, NF2, HIZCRx1, SAME),/*AVS_I2S1_MCLK*/ PAD_CFG_NF_IOSSTATE(GPIO_171, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_M_CLK_A1*/ PAD_CFG_NF_IOSSTATE(GPIO_172, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_M_CLK_B1*/ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_173, DN_20K, DEEP, NF1, HIZCRx1, ENPD),/*AVS_M_DATA_1*/ diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c index ad7048b49b..45cbc8f8c2 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c @@ -20,18 +20,27 @@ void __attribute__((weak)) variant_nhlt_init(struct nhlt *nhlt) { - /* 2 Channel DMIC array. */ - if (!nhlt_soc_add_dmic_array(nhlt, 2)) + /* 1-dmic configuration */ + if (IS_ENABLED(CONFIG_NHLT_DMIC_1CH_16B) && + !nhlt_soc_add_dmic_array(nhlt, 1)) + printk(BIOS_ERR, "Added 1CH DMIC array.\n"); + /* 2-dmic configuration */ + if (IS_ENABLED(CONFIG_NHLT_DMIC_2CH_16B) && + !nhlt_soc_add_dmic_array(nhlt, 2)) printk(BIOS_ERR, "Added 2CH DMIC array.\n"); + /* 4-dmic configuration */ + if (IS_ENABLED(CONFIG_NHLT_DMIC_4CH_16B) && + !nhlt_soc_add_dmic_array(nhlt, 4)) + printk(BIOS_ERR, "Added 4CH DMIC array.\n"); /* Dialog for Headset codec. * Headset codec is bi-directional but uses the same configuration * settings for render and capture endpoints. */ - if (!nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP1)) + if (!nhlt_soc_add_da7219(nhlt, AUDIO_LINK_SSP2)) printk(BIOS_ERR, "Added Dialog_7219 codec.\n"); /* MAXIM Smart Amps for left and right speakers. */ - if (!nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP5)) + if (!nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP1)) printk(BIOS_ERR, "Added Maxim_98357 codec.\n"); } |