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-rw-r--r--src/mainboard/advansus/a785e-i/mptable.c2
-rw-r--r--src/mainboard/amd/bimini_fam10/mptable.c2
-rw-r--r--src/mainboard/amd/dbm690t/mptable.c3
-rw-r--r--src/mainboard/amd/dinar/mptable.c6
-rw-r--r--src/mainboard/amd/inagua/mptable.c6
-rw-r--r--src/mainboard/amd/mahogany/mptable.c3
-rw-r--r--src/mainboard/amd/mahogany_fam10/mptable.c3
-rw-r--r--src/mainboard/amd/olivehill/mptable.c8
-rw-r--r--src/mainboard/amd/olivehillplus/mptable.c8
-rw-r--r--src/mainboard/amd/parmer/mptable.c6
-rw-r--r--src/mainboard/amd/persimmon/mptable.c6
-rw-r--r--src/mainboard/amd/pistachio/mptable.c3
-rw-r--r--src/mainboard/amd/serengeti_cheetah/mptable.c14
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/mptable.c14
-rw-r--r--src/mainboard/amd/south_station/mptable.c6
-rw-r--r--src/mainboard/amd/thatcher/mptable.c6
-rw-r--r--src/mainboard/amd/tilapia_fam10/mptable.c3
-rw-r--r--src/mainboard/amd/torpedo/mptable.c6
-rw-r--r--src/mainboard/amd/union_station/mptable.c6
-rw-r--r--src/mainboard/apple/macbook21/mptable.c2
-rw-r--r--src/mainboard/arima/hdama/mptable.c8
-rw-r--r--src/mainboard/asrock/939a785gmh/mptable.c3
-rw-r--r--src/mainboard/asrock/e350m1/mptable.c6
-rw-r--r--src/mainboard/asrock/imb-a180/mptable.c8
-rw-r--r--src/mainboard/asus/a8n_e/mptable.c2
-rw-r--r--src/mainboard/asus/a8v-e_deluxe/mptable.c4
-rw-r--r--src/mainboard/asus/a8v-e_se/mptable.c4
-rw-r--r--src/mainboard/asus/dsbf/devicetree.cb4
-rw-r--r--src/mainboard/asus/dsbf/romstage.c4
-rw-r--r--src/mainboard/asus/f2a85-m/mptable.c6
-rw-r--r--src/mainboard/asus/k8v-x/mptable.c4
-rw-r--r--src/mainboard/asus/kfsn4-dre/mptable.c3
-rw-r--r--src/mainboard/asus/m2n-e/mptable.c3
-rw-r--r--src/mainboard/asus/m2v/mptable.c4
-rw-r--r--src/mainboard/asus/m4a78-em/mptable.c3
-rw-r--r--src/mainboard/asus/m4a785-m/mptable.c3
-rw-r--r--src/mainboard/asus/m5a88-v/mptable.c2
-rw-r--r--src/mainboard/asus/p2b-d/mptable.c2
-rw-r--r--src/mainboard/asus/p2b-ds/mptable.c2
-rw-r--r--src/mainboard/avalue/eax-785e/mptable.c2
-rw-r--r--src/mainboard/broadcom/blast/mptable.c4
-rw-r--r--src/mainboard/getac/p470/mptable.c2
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/mptable.c3
-rw-r--r--src/mainboard/gigabyte/m57sli/mptable.c3
-rw-r--r--src/mainboard/gigabyte/ma785gm/mptable.c3
-rw-r--r--src/mainboard/gigabyte/ma785gmt/mptable.c3
-rw-r--r--src/mainboard/gigabyte/ma78gm/mptable.c3
-rw-r--r--src/mainboard/gizmosphere/gizmo/mptable.c6
-rw-r--r--src/mainboard/gizmosphere/gizmo2/mptable.c6
-rw-r--r--src/mainboard/google/bolt/romstage.c6
-rw-r--r--src/mainboard/google/butterfly/romstage.c6
-rw-r--r--src/mainboard/google/falco/romstage.c6
-rw-r--r--src/mainboard/google/link/romstage.c6
-rw-r--r--src/mainboard/google/panther/romstage.c6
-rw-r--r--src/mainboard/google/parrot/romstage.c6
-rw-r--r--src/mainboard/google/peppy/romstage.c6
-rw-r--r--src/mainboard/google/slippy/romstage.c6
-rw-r--r--src/mainboard/google/stout/romstage.c6
-rw-r--r--src/mainboard/hp/abm/mptable.c8
-rw-r--r--src/mainboard/hp/dl145_g1/mptable.c8
-rw-r--r--src/mainboard/hp/dl145_g3/mptable.c3
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/mptable.c3
-rw-r--r--src/mainboard/hp/pavilion_m6_1035dx/mptable.c6
-rw-r--r--src/mainboard/ibase/mb899/mptable.c2
-rw-r--r--src/mainboard/ibm/e325/mptable.c8
-rw-r--r--src/mainboard/ibm/e326/mptable.c8
-rw-r--r--src/mainboard/iei/kino-780am2-fam10/mptable.c3
-rw-r--r--src/mainboard/intel/baskingridge/romstage.c6
-rw-r--r--src/mainboard/intel/d945gclf/mptable.c2
-rw-r--r--src/mainboard/intel/eagleheights/mptable.c6
-rw-r--r--src/mainboard/intel/eagleheights/romstage.c2
-rw-r--r--src/mainboard/intel/emeraldlake2/romstage.c6
-rw-r--r--src/mainboard/intel/mohonpeak/romstage.c2
-rw-r--r--src/mainboard/intel/mtarvon/mptable.c2
-rw-r--r--src/mainboard/intel/truxton/mptable.c2
-rw-r--r--src/mainboard/iwave/iWRainbowG6/mptable.c2
-rw-r--r--src/mainboard/iwill/dk8_htx/mptable.c14
-rw-r--r--src/mainboard/iwill/dk8s2/mptable.c8
-rw-r--r--src/mainboard/iwill/dk8x/mptable.c8
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/mptable.c6
-rw-r--r--src/mainboard/jetway/pa78vm5/mptable.c3
-rw-r--r--src/mainboard/kontron/986lcd-m/mptable.c2
-rw-r--r--src/mainboard/kontron/kt690/mptable.c3
-rw-r--r--src/mainboard/kontron/ktqm77/romstage.c6
-rw-r--r--src/mainboard/lenovo/g505s/mptable.c6
-rw-r--r--src/mainboard/lenovo/t60/mptable.c2
-rw-r--r--src/mainboard/lenovo/x200/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/x60/mptable.c2
-rw-r--r--src/mainboard/lippert/frontrunner-af/mptable.c6
-rw-r--r--src/mainboard/lippert/toucan-af/mptable.c6
-rw-r--r--src/mainboard/msi/ms7135/mptable.c2
-rw-r--r--src/mainboard/msi/ms7260/mptable.c3
-rw-r--r--src/mainboard/msi/ms9185/mptable.c3
-rw-r--r--src/mainboard/msi/ms9282/mptable.c3
-rw-r--r--src/mainboard/msi/ms9652_fam10/mptable.c3
-rw-r--r--src/mainboard/newisys/khepri/mptable.c8
-rw-r--r--src/mainboard/nvidia/l1_2pvv/mptable.c6
-rw-r--r--src/mainboard/roda/rk886ex/mptable.c2
-rw-r--r--src/mainboard/roda/rk9/devicetree.cb2
-rw-r--r--src/mainboard/samsung/lumpy/devicetree.cb2
-rw-r--r--src/mainboard/samsung/lumpy/romstage.c6
-rw-r--r--src/mainboard/samsung/stumpy/romstage.c6
-rw-r--r--src/mainboard/siemens/sitemp_g1p1/mptable.c3
-rw-r--r--src/mainboard/sunw/ultra40/mptable.c12
-rw-r--r--src/mainboard/supermicro/h8dme/mptable.c3
-rw-r--r--src/mainboard/supermicro/h8dmr/mptable.c3
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/mptable.c3
-rw-r--r--src/mainboard/supermicro/h8qgi/mptable.c10
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/mptable.c3
-rw-r--r--src/mainboard/supermicro/h8scm/mptable.c12
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/mptable.c14
-rw-r--r--src/mainboard/supermicro/x7db8/romstage.c4
-rw-r--r--src/mainboard/technexion/tim5690/mptable.c3
-rw-r--r--src/mainboard/technexion/tim8690/mptable.c3
-rw-r--r--src/mainboard/thomson/ip1000/mainboard.c6
-rw-r--r--src/mainboard/tyan/s2735/mptable.c8
-rw-r--r--src/mainboard/tyan/s2850/mptable.c2
-rw-r--r--src/mainboard/tyan/s2875/mptable.c2
-rw-r--r--src/mainboard/tyan/s2880/mptable.c8
-rw-r--r--src/mainboard/tyan/s2881/mptable.c8
-rw-r--r--src/mainboard/tyan/s2882/mptable.c8
-rw-r--r--src/mainboard/tyan/s2885/mptable.c8
-rw-r--r--src/mainboard/tyan/s2891/mptable.c9
-rw-r--r--src/mainboard/tyan/s2892/mptable.c9
-rw-r--r--src/mainboard/tyan/s2895/mptable.c12
-rw-r--r--src/mainboard/tyan/s2912/mptable.c3
-rw-r--r--src/mainboard/tyan/s2912_fam10/mptable.c3
-rw-r--r--src/mainboard/tyan/s4880/mptable.c8
-rw-r--r--src/mainboard/tyan/s4882/mptable.c8
-rw-r--r--src/mainboard/tyan/s8226/mptable.c10
-rw-r--r--src/mainboard/via/epia-m850/devicetree.cb4
-rw-r--r--src/mainboard/via/pc2500e/mptable.c2
-rw-r--r--src/mainboard/via/vt8454c/mptable.c2
-rw-r--r--src/mainboard/winent/mb6047/mptable.c3
134 files changed, 382 insertions, 290 deletions
diff --git a/src/mainboard/advansus/a785e-i/mptable.c b/src/mainboard/advansus/a785e-i/mptable.c
index b04cf412dc..9d4feb8ebb 100644
--- a/src/mainboard/advansus/a785e-i/mptable.c
+++ b/src/mainboard/advansus/a785e-i/mptable.c
@@ -62,7 +62,7 @@ static void *smp_write_config_table(void *v)
/* I/O APICs: APIC ID Version State Address */
ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword);
dword &= 0xFFFFFFF0;
- smp_write_ioapic(mc, apicid_sb800, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb800, 0x11,(void *) dword);
for (byte = 0x0; byte < sizeof(intr_data); byte ++) {
outb(byte | 0x80, 0xC00);
diff --git a/src/mainboard/amd/bimini_fam10/mptable.c b/src/mainboard/amd/bimini_fam10/mptable.c
index 1d0f5bf031..ea3cc720ca 100644
--- a/src/mainboard/amd/bimini_fam10/mptable.c
+++ b/src/mainboard/amd/bimini_fam10/mptable.c
@@ -66,7 +66,7 @@ static void *smp_write_config_table(void *v)
dword |= (pm_ioread(0x35) & 0xFF) << 8;
dword |= (pm_ioread(0x36) & 0xFF) << 16;
dword |= (pm_ioread(0x37) & 0xFF) << 24;
- smp_write_ioapic(mc, apicid_sb800, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb800, 0x11,(void *) dword);
for (byte = 0x0; byte < sizeof(intr_data); byte ++) {
outb(byte | 0x80, 0xC00);
diff --git a/src/mainboard/amd/dbm690t/mptable.c b/src/mainboard/amd/dbm690t/mptable.c
index 09d137a174..511db716fb 100644
--- a/src/mainboard/amd/dbm690t/mptable.c
+++ b/src/mainboard/amd/dbm690t/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb600 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb600, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb600,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/amd/dinar/mptable.c b/src/mainboard/amd/dinar/mptable.c
index 4e481f51b6..197d1c3332 100644
--- a/src/mainboard/amd/dinar/mptable.c
+++ b/src/mainboard/amd/dinar/mptable.c
@@ -35,7 +35,7 @@ static void *smp_write_config_table(void *v)
u32 apicid_sb700;
u32 apicid_rd890;
device_t dev;
- u32 dword;
+ u8 *dword;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
@@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set sb700 IOAPIC ID */
- dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
+ dword = (u8 *)(pci_read_config32(dev, 0x74) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sb700, 0x20, dword);
/*
@@ -80,7 +80,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0, 0));
if (dev) {
pci_write_config32(dev, 0xF8, 0x1);
- dword = pci_read_config32(dev, 0xFC) & 0xfffffff0;
+ dword = (u8 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
smp_write_ioapic(mc, apicid_rd890, 0x20, dword);
}
diff --git a/src/mainboard/amd/inagua/mptable.c b/src/mainboard/amd/inagua/mptable.c
index 7686bd2ff7..44eda7118b 100644
--- a/src/mainboard/amd/inagua/mptable.c
+++ b/src/mainboard/amd/inagua/mptable.c
@@ -52,8 +52,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -65,7 +65,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
u8 byte;
diff --git a/src/mainboard/amd/mahogany/mptable.c b/src/mainboard/amd/mahogany/mptable.c
index bd31846cf6..4c1946c314 100644
--- a/src/mainboard/amd/mahogany/mptable.c
+++ b/src/mainboard/amd/mahogany/mptable.c
@@ -60,7 +60,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb700 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb700, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb700,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/amd/mahogany_fam10/mptable.c b/src/mainboard/amd/mahogany_fam10/mptable.c
index 11426c2343..678610393c 100644
--- a/src/mainboard/amd/mahogany_fam10/mptable.c
+++ b/src/mainboard/amd/mahogany_fam10/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb700 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb700, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb700,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/amd/olivehill/mptable.c b/src/mainboard/amd/olivehill/mptable.c
index db4a3ffa8e..db3ffb16f2 100644
--- a/src/mainboard/amd/olivehill/mptable.c
+++ b/src/mainboard/amd/olivehill/mptable.c
@@ -75,8 +75,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -92,9 +92,9 @@ static void *smp_write_config_table(void *v)
my_smp_write_bus(mc, bus_isa, "ISA ");
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
- smp_write_ioapic(mc, ioapic_id+1, 0x21, 0xFEC20000);
+ smp_write_ioapic(mc, ioapic_id+1, 0x21, (void *)0xFEC20000);
/* PIC IRQ routine */
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
outb(byte, 0xC00);
diff --git a/src/mainboard/amd/olivehillplus/mptable.c b/src/mainboard/amd/olivehillplus/mptable.c
index d49c998332..bc15d81764 100644
--- a/src/mainboard/amd/olivehillplus/mptable.c
+++ b/src/mainboard/amd/olivehillplus/mptable.c
@@ -75,8 +75,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -92,9 +92,9 @@ static void *smp_write_config_table(void *v)
my_smp_write_bus(mc, bus_isa, "ISA ");
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
- smp_write_ioapic(mc, ioapic_id+1, 0x21, 0xFEC20000);
+ smp_write_ioapic(mc, ioapic_id+1, 0x21, (void *)0xFEC20000);
/* PIC IRQ routine */
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
outb(byte, 0xC00);
diff --git a/src/mainboard/amd/parmer/mptable.c b/src/mainboard/amd/parmer/mptable.c
index 05da01a4d9..cb0bbba2c9 100644
--- a/src/mainboard/amd/parmer/mptable.c
+++ b/src/mainboard/amd/parmer/mptable.c
@@ -75,8 +75,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -92,7 +92,7 @@ static void *smp_write_config_table(void *v)
my_smp_write_bus(mc, bus_isa, "ISA ");
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
/* PIC IRQ routine */
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
diff --git a/src/mainboard/amd/persimmon/mptable.c b/src/mainboard/amd/persimmon/mptable.c
index 1227d8948f..0cf57bdcce 100644
--- a/src/mainboard/amd/persimmon/mptable.c
+++ b/src/mainboard/amd/persimmon/mptable.c
@@ -41,8 +41,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
/* Intialize the MP_Table */
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -67,7 +67,7 @@ static void *smp_write_config_table(void *v)
* Type 2: I/O APICs:
* APIC ID, Version, APIC Flags:EN, Address
*/
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
/*
* Type 3: I/O Interrupt Table Entries:
diff --git a/src/mainboard/amd/pistachio/mptable.c b/src/mainboard/amd/pistachio/mptable.c
index 09d137a174..511db716fb 100644
--- a/src/mainboard/amd/pistachio/mptable.c
+++ b/src/mainboard/amd/pistachio/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb600 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb600, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb600,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c
index 866875dc63..56df3fa4d6 100644
--- a/src/mainboard/amd/serengeti_cheetah/mptable.c
+++ b/src/mainboard/amd/serengeti_cheetah/mptable.c
@@ -29,7 +29,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
- smp_write_ioapic(mc, m->apicid_8111, 0x11, IO_APIC_ADDR); //8111
+ smp_write_ioapic(mc, m->apicid_8111, 0x11, VIO_APIC_VADDR); //8111
{
device_t dev;
struct resource *res;
@@ -37,14 +37,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132_1, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132_2, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
@@ -60,14 +62,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11,
+ res2mmio(res, 0, 0));
}
}
break;
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c
index 5335cb8290..56c6fc0350 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c
@@ -48,7 +48,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
- smp_write_ioapic(mc, m->apicid_8111, 0x11, IO_APIC_ADDR); //8111
+ smp_write_ioapic(mc, m->apicid_8111, 0x11, VIO_APIC_VADDR); //8111
{
device_t dev;
struct resource *res;
@@ -56,14 +56,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132_1, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132_2, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
@@ -79,14 +81,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11,
+ res2mmio(res, 0, 0));
}
}
break;
diff --git a/src/mainboard/amd/south_station/mptable.c b/src/mainboard/amd/south_station/mptable.c
index c2ec4a26df..6b35ce821e 100644
--- a/src/mainboard/amd/south_station/mptable.c
+++ b/src/mainboard/amd/south_station/mptable.c
@@ -49,8 +49,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -62,7 +62,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
u8 byte;
diff --git a/src/mainboard/amd/thatcher/mptable.c b/src/mainboard/amd/thatcher/mptable.c
index 8ddd1b6740..f6d5e6e2e2 100644
--- a/src/mainboard/amd/thatcher/mptable.c
+++ b/src/mainboard/amd/thatcher/mptable.c
@@ -75,8 +75,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -92,7 +92,7 @@ static void *smp_write_config_table(void *v)
my_smp_write_bus(mc, bus_isa, "ISA ");
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
/* PIC IRQ routine */
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
diff --git a/src/mainboard/amd/tilapia_fam10/mptable.c b/src/mainboard/amd/tilapia_fam10/mptable.c
index 11426c2343..678610393c 100644
--- a/src/mainboard/amd/tilapia_fam10/mptable.c
+++ b/src/mainboard/amd/tilapia_fam10/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb700 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb700, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb700,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/amd/torpedo/mptable.c b/src/mainboard/amd/torpedo/mptable.c
index 477d97adbf..02206a9d87 100644
--- a/src/mainboard/amd/torpedo/mptable.c
+++ b/src/mainboard/amd/torpedo/mptable.c
@@ -107,11 +107,11 @@ static void *smp_write_config_table(void *v)
/* I/O APICs: APIC ID Version State Address */
- u32 dword;
+ u8 *dword;
u8 byte;
- ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword);
- dword &= 0xFFFFFFF0;
+ ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword);
+ dword = (u8 *)(((uintptr_t) dword) & 0xFFFFFFF0);
/* Set IO APIC ID onto IO_APIC_ID */
write32 (dword, 0x00);
write32 (dword + 0x10, IO_APIC_ID << 24);
diff --git a/src/mainboard/amd/union_station/mptable.c b/src/mainboard/amd/union_station/mptable.c
index c2ec4a26df..b6e196a8fb 100644
--- a/src/mainboard/amd/union_station/mptable.c
+++ b/src/mainboard/amd/union_station/mptable.c
@@ -49,8 +49,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -62,7 +62,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
u8 byte;
diff --git a/src/mainboard/apple/macbook21/mptable.c b/src/mainboard/apple/macbook21/mptable.c
index cc97e52377..27ab1e0ed3 100644
--- a/src/mainboard/apple/macbook21/mptable.c
+++ b/src/mainboard/apple/macbook21/mptable.c
@@ -41,7 +41,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x20, VIO_APIC_VADDR);
/* Legacy Interrupts */
mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
diff --git a/src/mainboard/arima/hdama/mptable.c b/src/mainboard/arima/hdama/mptable.c
index 6ee2704555..d6c3d2f6e8 100644
--- a/src/mainboard/arima/hdama/mptable.c
+++ b/src/mainboard/arima/hdama/mptable.c
@@ -125,7 +125,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
- smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, apicid_8111, 0x11, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -134,7 +134,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
/* 8131 apic 4 */
@@ -142,7 +143,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/asrock/939a785gmh/mptable.c b/src/mainboard/asrock/939a785gmh/mptable.c
index 790d1dac50..fe2ebd83bd 100644
--- a/src/mainboard/asrock/939a785gmh/mptable.c
+++ b/src/mainboard/asrock/939a785gmh/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb700 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb700, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb700,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/asrock/e350m1/mptable.c b/src/mainboard/asrock/e350m1/mptable.c
index 14fa31675f..897a077bee 100644
--- a/src/mainboard/asrock/e350m1/mptable.c
+++ b/src/mainboard/asrock/e350m1/mptable.c
@@ -50,8 +50,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -63,7 +63,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
u8 byte;
diff --git a/src/mainboard/asrock/imb-a180/mptable.c b/src/mainboard/asrock/imb-a180/mptable.c
index d9ca7b74a2..90fa10d7c4 100644
--- a/src/mainboard/asrock/imb-a180/mptable.c
+++ b/src/mainboard/asrock/imb-a180/mptable.c
@@ -76,8 +76,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -93,9 +93,9 @@ static void *smp_write_config_table(void *v)
my_smp_write_bus(mc, bus_isa, "ISA ");
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
- smp_write_ioapic(mc, ioapic_id+1, 0x21, 0xFEC20000);
+ smp_write_ioapic(mc, ioapic_id+1, 0x21, (void *)0xFEC20000);
/* PIC IRQ routine */
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
outb(byte, 0xC00);
diff --git a/src/mainboard/asus/a8n_e/mptable.c b/src/mainboard/asus/a8n_e/mptable.c
index a954d92ea9..56d2150a8f 100644
--- a/src/mainboard/asus/a8n_e/mptable.c
+++ b/src/mainboard/asus/a8n_e/mptable.c
@@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
smp_write_ioapic(mc, apicid_ck804, 0x11,
- res->base);
+ res2mmio(res, 0, 0));
}
/* Initialize interrupt mapping. */
diff --git a/src/mainboard/asus/a8v-e_deluxe/mptable.c b/src/mainboard/asus/a8v-e_deluxe/mptable.c
index 71e0e1e95e..ebd15bae1b 100644
--- a/src/mainboard/asus/a8v-e_deluxe/mptable.c
+++ b/src/mainboard/asus/a8v-e_deluxe/mptable.c
@@ -38,8 +38,8 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, IO_APIC_ADDR);
- smp_write_ioapic(mc, K8T890_APIC_ID, 0x20, K8T890_APIC_BASE);
+ smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VIO_APIC_VADDR);
+ smp_write_ioapic(mc, K8T890_APIC_ID, 0x20, (void *)K8T890_APIC_BASE);
mptable_add_isa_interrupts(mc, bus_isa, VT8237R_APIC_ID, 0);
diff --git a/src/mainboard/asus/a8v-e_se/mptable.c b/src/mainboard/asus/a8v-e_se/mptable.c
index 71e0e1e95e..ebd15bae1b 100644
--- a/src/mainboard/asus/a8v-e_se/mptable.c
+++ b/src/mainboard/asus/a8v-e_se/mptable.c
@@ -38,8 +38,8 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, IO_APIC_ADDR);
- smp_write_ioapic(mc, K8T890_APIC_ID, 0x20, K8T890_APIC_BASE);
+ smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VIO_APIC_VADDR);
+ smp_write_ioapic(mc, K8T890_APIC_ID, 0x20, (void *)K8T890_APIC_BASE);
mptable_add_isa_interrupts(mc, bus_isa, VT8237R_APIC_ID, 0);
diff --git a/src/mainboard/asus/dsbf/devicetree.cb b/src/mainboard/asus/dsbf/devicetree.cb
index b4d1b63ff8..0d3b6c8249 100644
--- a/src/mainboard/asus/dsbf/devicetree.cb
+++ b/src/mainboard/asus/dsbf/devicetree.cb
@@ -91,13 +91,13 @@ chip northbridge/intel/i5000
register "have_isa_interrupts" = "1"
register "irq_on_fsb" = "1"
register "enable_virtual_wire" = "1"
- register "base" = "0xfec00000"
+ register "base" = "(void *)0xfec00000"
device ioapic 8 on end
end
chip drivers/generic/ioapic
register "irq_on_fsb" = "1"
- register "base" = "0xfec80000"
+ register "base" = "(void *)0xfec80000"
device ioapic 9 on end
end
diff --git a/src/mainboard/asus/dsbf/romstage.c b/src/mainboard/asus/dsbf/romstage.c
index d7bcb89554..699aae1289 100644
--- a/src/mainboard/asus/dsbf/romstage.c
+++ b/src/mainboard/asus/dsbf/romstage.c
@@ -49,7 +49,7 @@ static void early_config(void)
u32 gcs, rpc, fd;
/* Enable RCBA */
- pci_write_config32(PCI_DEV(0, 0x1F, 0), RCBA, DEFAULT_RCBA | 1);
+ pci_write_config32(PCI_DEV(0, 0x1F, 0), RCBA, (uintptr_t)DEFAULT_RCBA | 1);
/* Disable watchdog */
gcs = read32(DEFAULT_RCBA + RCBA_GCS);
@@ -138,7 +138,7 @@ void main(unsigned long bist)
smbus_write_byte(0x6f, 0x08, 0x06);
smbus_write_byte(0x6f, 0x09, 0x00);
- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xf0, DEFAULT_RCBA | 1);
+ pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xf0, (uintptr_t)DEFAULT_RCBA | 1);
i5000_fbdimm_init();
smbus_write_byte(0x69, 0x01, 0x01);
}
diff --git a/src/mainboard/asus/f2a85-m/mptable.c b/src/mainboard/asus/f2a85-m/mptable.c
index cc81819d1c..7509dd03e5 100644
--- a/src/mainboard/asus/f2a85-m/mptable.c
+++ b/src/mainboard/asus/f2a85-m/mptable.c
@@ -75,8 +75,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -92,7 +92,7 @@ static void *smp_write_config_table(void *v)
my_smp_write_bus(mc, bus_isa, "ISA ");
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
/* PIC IRQ routine */
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
diff --git a/src/mainboard/asus/k8v-x/mptable.c b/src/mainboard/asus/k8v-x/mptable.c
index 794194c297..59ff9aad56 100644
--- a/src/mainboard/asus/k8v-x/mptable.c
+++ b/src/mainboard/asus/k8v-x/mptable.c
@@ -38,8 +38,8 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, IO_APIC_ADDR);
- smp_write_ioapic(mc, K8T890_APIC_ID, 0x20, K8T890_APIC_BASE);
+ smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VIO_APIC_VADDR);
+ smp_write_ioapic(mc, K8T890_APIC_ID, 0x20, (void *)K8T890_APIC_BASE);
mptable_add_isa_interrupts(mc, bus_isa, VT8237R_APIC_ID, 0);
diff --git a/src/mainboard/asus/kfsn4-dre/mptable.c b/src/mainboard/asus/kfsn4-dre/mptable.c
index 46ae594081..6487a431cc 100644
--- a/src/mainboard/asus/kfsn4-dre/mptable.c
+++ b/src/mainboard/asus/kfsn4-dre/mptable.c
@@ -62,7 +62,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_ck804, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_ck804, 0x11,
+ res2mmio(res, 0, 0));
}
/* Initialize interrupt mapping. */
diff --git a/src/mainboard/asus/m2n-e/mptable.c b/src/mainboard/asus/m2n-e/mptable.c
index 333ec495f4..824ee3113b 100644
--- a/src/mainboard/asus/m2n-e/mptable.c
+++ b/src/mainboard/asus/m2n-e/mptable.c
@@ -56,7 +56,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res)
- smp_write_ioapic(mc, apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
pci_write_config32(dev, 0x7c, 0x00000000);
pci_write_config32(dev, 0x80, 0x11002009);
diff --git a/src/mainboard/asus/m2v/mptable.c b/src/mainboard/asus/m2v/mptable.c
index b74a1e36c3..22c66131de 100644
--- a/src/mainboard/asus/m2v/mptable.c
+++ b/src/mainboard/asus/m2v/mptable.c
@@ -48,8 +48,8 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, VT8237R_APIC_ID, 0x3, IO_APIC_ADDR);
- smp_write_ioapic(mc, K8T890_APIC_ID, 0x3, K8T890_APIC_BASE);
+ smp_write_ioapic(mc, VT8237R_APIC_ID, 0x3, VIO_APIC_VADDR);
+ smp_write_ioapic(mc, K8T890_APIC_ID, 0x3, (void*)K8T890_APIC_BASE);
mptable_add_isa_interrupts(mc, bus_isa, VT8237R_APIC_ID, 0);
diff --git a/src/mainboard/asus/m4a78-em/mptable.c b/src/mainboard/asus/m4a78-em/mptable.c
index 11426c2343..678610393c 100644
--- a/src/mainboard/asus/m4a78-em/mptable.c
+++ b/src/mainboard/asus/m4a78-em/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb700 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb700, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb700,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/asus/m4a785-m/mptable.c b/src/mainboard/asus/m4a785-m/mptable.c
index 11426c2343..678610393c 100644
--- a/src/mainboard/asus/m4a785-m/mptable.c
+++ b/src/mainboard/asus/m4a785-m/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb700 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb700, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb700,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/asus/m5a88-v/mptable.c b/src/mainboard/asus/m5a88-v/mptable.c
index 5259dec77f..4d6bb221c3 100644
--- a/src/mainboard/asus/m5a88-v/mptable.c
+++ b/src/mainboard/asus/m5a88-v/mptable.c
@@ -62,7 +62,7 @@ static void *smp_write_config_table(void *v)
/* I/O APICs: APIC ID Version State Address */
ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword);
dword &= 0xFFFFFFF0;
- smp_write_ioapic(mc, apicid_sb800, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb800, 0x11,(void *) dword);
for (byte = 0x0; byte < sizeof(intr_data); byte ++) {
outb(byte | 0x80, 0xC00);
diff --git a/src/mainboard/asus/p2b-d/mptable.c b/src/mainboard/asus/p2b-d/mptable.c
index 51d00a35dd..ef9301e93e 100644
--- a/src/mainboard/asus/p2b-d/mptable.c
+++ b/src/mainboard/asus/p2b-d/mptable.c
@@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v)
ioapic_id = 2;
ioapic_ver = 0x11; /* External Intel 82093AA IOAPIC. */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
/* Legacy Interrupts */
mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);
diff --git a/src/mainboard/asus/p2b-ds/mptable.c b/src/mainboard/asus/p2b-ds/mptable.c
index ee3c20e1b6..359c810507 100644
--- a/src/mainboard/asus/p2b-ds/mptable.c
+++ b/src/mainboard/asus/p2b-ds/mptable.c
@@ -40,7 +40,7 @@ static void *smp_write_config_table(void *v)
ioapic_id = 2;
ioapic_ver = 0x11; /* External Intel 82093AA IOAPIC. */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
/* Legacy Interrupts */
mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);
diff --git a/src/mainboard/avalue/eax-785e/mptable.c b/src/mainboard/avalue/eax-785e/mptable.c
index 9c25da6509..9803fabbb0 100644
--- a/src/mainboard/avalue/eax-785e/mptable.c
+++ b/src/mainboard/avalue/eax-785e/mptable.c
@@ -63,7 +63,7 @@ static void *smp_write_config_table(void *v)
ReadPMIO(SB_PMIOA_REG34, AccWidthUint32, &dword);
dword &= 0xFFFFFFF0;
- smp_write_ioapic(mc, apicid_sb800, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb800, 0x11,(void *) dword);
for (byte = 0x0; byte < sizeof(intr_data); byte ++) {
outb(byte | 0x80, 0xC00);
diff --git a/src/mainboard/broadcom/blast/mptable.c b/src/mainboard/broadcom/blast/mptable.c
index d7ae6b787c..d283d85526 100644
--- a/src/mainboard/broadcom/blast/mptable.c
+++ b/src/mainboard/broadcom/blast/mptable.c
@@ -41,7 +41,9 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_bcm5785[i], 0x11, res->base);
+ smp_write_ioapic(mc, apicid_bcm5785[i],
+ 0x11,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/getac/p470/mptable.c b/src/mainboard/getac/p470/mptable.c
index 9b59bb470e..05586b96bf 100644
--- a/src/mainboard/getac/p470/mptable.c
+++ b/src/mainboard/getac/p470/mptable.c
@@ -41,7 +41,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x20, VIO_APIC_VADDR);
/* Legacy Interrupts */
mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
index 0af6cf0b00..2f1fad81ee 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_sis966, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_sis966, 0x11,
+ res2mmio(res, 0, 0));
}
dword = 0x43c6c643;
diff --git a/src/mainboard/gigabyte/m57sli/mptable.c b/src/mainboard/gigabyte/m57sli/mptable.c
index 1536823f88..673e9e727a 100644
--- a/src/mainboard/gigabyte/m57sli/mptable.c
+++ b/src/mainboard/gigabyte/m57sli/mptable.c
@@ -57,7 +57,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
}
/* set up the interrupt registers of mcp55 */
pci_write_config32(dev, 0x7c, 0xc643c643);
diff --git a/src/mainboard/gigabyte/ma785gm/mptable.c b/src/mainboard/gigabyte/ma785gm/mptable.c
index 11426c2343..678610393c 100644
--- a/src/mainboard/gigabyte/ma785gm/mptable.c
+++ b/src/mainboard/gigabyte/ma785gm/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb700 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb700, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb700,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/gigabyte/ma785gmt/mptable.c b/src/mainboard/gigabyte/ma785gmt/mptable.c
index 11426c2343..678610393c 100644
--- a/src/mainboard/gigabyte/ma785gmt/mptable.c
+++ b/src/mainboard/gigabyte/ma785gmt/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb700 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb700, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb700,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/gigabyte/ma78gm/mptable.c b/src/mainboard/gigabyte/ma78gm/mptable.c
index 11426c2343..678610393c 100644
--- a/src/mainboard/gigabyte/ma78gm/mptable.c
+++ b/src/mainboard/gigabyte/ma78gm/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb700 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb700, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb700,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/gizmosphere/gizmo/mptable.c b/src/mainboard/gizmosphere/gizmo/mptable.c
index b98598afe3..5db689d49b 100644
--- a/src/mainboard/gizmosphere/gizmo/mptable.c
+++ b/src/mainboard/gizmosphere/gizmo/mptable.c
@@ -50,8 +50,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -63,7 +63,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
u8 byte;
diff --git a/src/mainboard/gizmosphere/gizmo2/mptable.c b/src/mainboard/gizmosphere/gizmo2/mptable.c
index fbf6744542..192b0c07f9 100644
--- a/src/mainboard/gizmosphere/gizmo2/mptable.c
+++ b/src/mainboard/gizmosphere/gizmo2/mptable.c
@@ -40,8 +40,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
/* Intialize the MP_Table */
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -66,7 +66,7 @@ static void *smp_write_config_table(void *v)
* Type 2: I/O APICs:
* APIC ID, Version, APIC Flags:EN, Address
*/
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
/*
* Type 3: I/O Interrupt Table Entries:
diff --git a/src/mainboard/google/bolt/romstage.c b/src/mainboard/google/bolt/romstage.c
index a623ae29bd..91ac6a063b 100644
--- a/src/mainboard/google/bolt/romstage.c
+++ b/src/mainboard/google/bolt/romstage.c
@@ -102,15 +102,15 @@ void mainboard_romstage_entry(unsigned long bist)
{
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = DEFAULT_PCIEXBAR,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
- .rcba = DEFAULT_RCBA,
+ .rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.temp_mmio_base = 0xfed08000,
diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c
index 70a6f444c7..b1172950eb 100644
--- a/src/mainboard/google/butterfly/romstage.c
+++ b/src/mainboard/google/butterfly/romstage.c
@@ -81,15 +81,15 @@ void main(unsigned long bist)
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = CONFIG_HPET_ADDRESS,
- .rcba = DEFAULT_RCBABASE,
+ .rcba = (uintptr_t)DEFAULT_RCBABASE,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.thermalbase = 0xfed08000,
diff --git a/src/mainboard/google/falco/romstage.c b/src/mainboard/google/falco/romstage.c
index 470c1cdc57..fb811da879 100644
--- a/src/mainboard/google/falco/romstage.c
+++ b/src/mainboard/google/falco/romstage.c
@@ -111,15 +111,15 @@ void mainboard_romstage_entry(unsigned long bist)
{
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = DEFAULT_PCIEXBAR,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
- .rcba = DEFAULT_RCBA,
+ .rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.temp_mmio_base = 0xfed08000,
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index 873de91321..b5d64b0669 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -122,15 +122,15 @@ void main(unsigned long bist)
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = CONFIG_HPET_ADDRESS,
- .rcba = DEFAULT_RCBABASE,
+ .rcba = (uintptr_t)DEFAULT_RCBABASE,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.thermalbase = 0xfed08000,
diff --git a/src/mainboard/google/panther/romstage.c b/src/mainboard/google/panther/romstage.c
index dcc935baa4..48da4b2a51 100644
--- a/src/mainboard/google/panther/romstage.c
+++ b/src/mainboard/google/panther/romstage.c
@@ -81,15 +81,15 @@ void mainboard_romstage_entry(unsigned long bist)
{
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = DEFAULT_PCIEXBAR,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
- .rcba = DEFAULT_RCBA,
+ .rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.temp_mmio_base = 0xfed08000,
diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c
index 7d67abd181..f2e7345ce5 100644
--- a/src/mainboard/google/parrot/romstage.c
+++ b/src/mainboard/google/parrot/romstage.c
@@ -81,15 +81,15 @@ void main(unsigned long bist)
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = CONFIG_HPET_ADDRESS,
- .rcba = DEFAULT_RCBABASE,
+ .rcba = (uintptr_t)DEFAULT_RCBABASE,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.thermalbase = 0xfed08000,
diff --git a/src/mainboard/google/peppy/romstage.c b/src/mainboard/google/peppy/romstage.c
index 9a1fb769a8..f8d9cb9039 100644
--- a/src/mainboard/google/peppy/romstage.c
+++ b/src/mainboard/google/peppy/romstage.c
@@ -122,15 +122,15 @@ void mainboard_romstage_entry(unsigned long bist)
{
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = DEFAULT_PCIEXBAR,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
- .rcba = DEFAULT_RCBA,
+ .rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.temp_mmio_base = 0xfed08000,
diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c
index 6feebac28c..8f6df2f728 100644
--- a/src/mainboard/google/slippy/romstage.c
+++ b/src/mainboard/google/slippy/romstage.c
@@ -137,15 +137,15 @@ void mainboard_romstage_entry(unsigned long bist)
{
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = DEFAULT_PCIEXBAR,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
- .rcba = DEFAULT_RCBA,
+ .rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.temp_mmio_base = 0xfed08000,
diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c
index f856c59d2f..714d8f13c9 100644
--- a/src/mainboard/google/stout/romstage.c
+++ b/src/mainboard/google/stout/romstage.c
@@ -122,15 +122,15 @@ void main(unsigned long bist)
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = CONFIG_HPET_ADDRESS,
- .rcba = DEFAULT_RCBABASE,
+ .rcba = (uintptr_t)DEFAULT_RCBABASE,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.thermalbase = 0xfed08000,
diff --git a/src/mainboard/hp/abm/mptable.c b/src/mainboard/hp/abm/mptable.c
index 629888ae08..4140356677 100644
--- a/src/mainboard/hp/abm/mptable.c
+++ b/src/mainboard/hp/abm/mptable.c
@@ -76,8 +76,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -93,9 +93,9 @@ static void *smp_write_config_table(void *v)
my_smp_write_bus(mc, bus_isa, "ISA ");
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
- smp_write_ioapic(mc, ioapic_id+1, 0x21, 0xFEC20000);
+ smp_write_ioapic(mc, ioapic_id+1, 0x21, (void *)0xFEC20000);
/* PIC IRQ routine */
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
outb(byte, 0xC00);
diff --git a/src/mainboard/hp/dl145_g1/mptable.c b/src/mainboard/hp/dl145_g1/mptable.c
index b9af38b78d..1a9132e46c 100644
--- a/src/mainboard/hp/dl145_g1/mptable.c
+++ b/src/mainboard/hp/dl145_g1/mptable.c
@@ -29,7 +29,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
- smp_write_ioapic(mc, m->apicid_8111, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, m->apicid_8111, 0x20, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -37,14 +37,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8131_1, 0x20, res->base);
+ smp_write_ioapic(mc, m->apicid_8131_1, 0x20,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(m->bus_8131_0, PCI_DEVFN(m->sbdn3+1,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8131_2, 0x20, res->base);
+ smp_write_ioapic(mc, m->apicid_8131_2, 0x20,
+ res2mmio(res, 0, 0));
}
}
diff --git a/src/mainboard/hp/dl145_g3/mptable.c b/src/mainboard/hp/dl145_g3/mptable.c
index 6c71bad5f3..d89352d1e3 100644
--- a/src/mainboard/hp/dl145_g3/mptable.c
+++ b/src/mainboard/hp/dl145_g3/mptable.c
@@ -67,7 +67,8 @@ static void *smp_write_config_table(void *v)
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
printk(BIOS_DEBUG, "APIC %d base address: %llx\n",m->apicid_bcm5785[i], res->base);
- smp_write_ioapic(mc, m->apicid_bcm5785[i], 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_bcm5785[i], 0x11,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/hp/dl165_g6_fam10/mptable.c b/src/mainboard/hp/dl165_g6_fam10/mptable.c
index 86f2cc62f4..5eda5583fb 100644
--- a/src/mainboard/hp/dl165_g6_fam10/mptable.c
+++ b/src/mainboard/hp/dl165_g6_fam10/mptable.c
@@ -68,7 +68,8 @@ static void *smp_write_config_table(void *v)
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
printk(BIOS_DEBUG, "APIC %d base address: %x\n",m->apicid_bcm5785[i], (int)res->base);
- smp_write_ioapic(mc, m->apicid_bcm5785[i], 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_bcm5785[i], 0x11,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/mptable.c b/src/mainboard/hp/pavilion_m6_1035dx/mptable.c
index 65b1279e47..75730b7201 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/mptable.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/mptable.c
@@ -76,8 +76,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -93,7 +93,7 @@ static void *smp_write_config_table(void *v)
my_smp_write_bus(mc, bus_isa, "ISA ");
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
/* PIC IRQ routine */
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
diff --git a/src/mainboard/ibase/mb899/mptable.c b/src/mainboard/ibase/mb899/mptable.c
index 1baf72838e..6079a1d699 100644
--- a/src/mainboard/ibase/mb899/mptable.c
+++ b/src/mainboard/ibase/mb899/mptable.c
@@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
/* I/O APICs: APIC ID Version State Address */
ioapic_id = 2;
- smp_write_ioapic(mc, ioapic_id, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, 0x20, VIO_APIC_VADDR);
/* Legacy Interrupts */
diff --git a/src/mainboard/ibm/e325/mptable.c b/src/mainboard/ibm/e325/mptable.c
index 6eb6390a03..1dad72c6e1 100644
--- a/src/mainboard/ibm/e325/mptable.c
+++ b/src/mainboard/ibm/e325/mptable.c
@@ -58,7 +58,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* Legacy IOAPIC #2 */
- smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x11, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -67,7 +67,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x03, 0x11, res->base);
+ smp_write_ioapic(mc, 0x03, 0x11,
+ res2mmio(res, 0, 0));
}
}
/* 8131-2 apic #4 */
@@ -75,7 +76,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x04, 0x11, res->base);
+ smp_write_ioapic(mc, 0x04, 0x11,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/ibm/e326/mptable.c b/src/mainboard/ibm/e326/mptable.c
index f271166f7a..46dabd3893 100644
--- a/src/mainboard/ibm/e326/mptable.c
+++ b/src/mainboard/ibm/e326/mptable.c
@@ -57,7 +57,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* Legacy IOAPIC #2 */
- smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x11, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -66,7 +66,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x03, 0x11, res->base);
+ smp_write_ioapic(mc, 0x03, 0x11,
+ res2mmio(res, 0, 0));
}
}
/* 8131-2 apic #4 */
@@ -74,7 +75,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x04, 0x11, res->base);
+ smp_write_ioapic(mc, 0x04, 0x11,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/iei/kino-780am2-fam10/mptable.c b/src/mainboard/iei/kino-780am2-fam10/mptable.c
index 11426c2343..678610393c 100644
--- a/src/mainboard/iei/kino-780am2-fam10/mptable.c
+++ b/src/mainboard/iei/kino-780am2-fam10/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb700 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb700, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb700,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c
index 7aea6b6eae..e1bdb30bda 100644
--- a/src/mainboard/intel/baskingridge/romstage.c
+++ b/src/mainboard/intel/baskingridge/romstage.c
@@ -71,15 +71,15 @@ void mainboard_romstage_entry(unsigned long bist)
{
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = DEFAULT_PCIEXBAR,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = HPET_ADDR,
- .rcba = DEFAULT_RCBA,
+ .rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.temp_mmio_base = 0xfed08000,
diff --git a/src/mainboard/intel/d945gclf/mptable.c b/src/mainboard/intel/d945gclf/mptable.c
index b0360bfe08..ee05919e6d 100644
--- a/src/mainboard/intel/d945gclf/mptable.c
+++ b/src/mainboard/intel/d945gclf/mptable.c
@@ -39,7 +39,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x20, VIO_APIC_VADDR);
/* Legacy Interrupts */
diff --git a/src/mainboard/intel/eagleheights/mptable.c b/src/mainboard/intel/eagleheights/mptable.c
index 809feec9de..b9c2fc3cf3 100644
--- a/src/mainboard/intel/eagleheights/mptable.c
+++ b/src/mainboard/intel/eagleheights/mptable.c
@@ -67,14 +67,14 @@ static void *smp_write_config_table(void *v)
uint32_t pin, route;
device_t dev;
struct resource *res;
- unsigned long rcba;
+ u8 *rcba;
dev = dev_find_slot(0, PCI_DEVFN(0x1F,0));
res = find_resource(dev, RCBA);
if (!res) {
return NULL;
}
- rcba = res->base;
+ rcba = res2mmio(res, 0, 0);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -121,7 +121,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x20, VIO_APIC_VADDR);
mptable_add_isa_interrupts(mc, bus_isa, IO_APIC0, 0);
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index 5700162112..a45ef7e566 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -83,7 +83,7 @@ static void early_config(void)
u32 gcs, rpc, fd;
/* Enable RCBA */
- pci_write_config32(PCI_DEV(0, 0x1F, 0), RCBA, DEFAULT_RCBA | 1);
+ pci_write_config32(PCI_DEV(0, 0x1F, 0), RCBA, (uintptr_t)DEFAULT_RCBA | 1);
/* Disable watchdog */
gcs = read32(DEFAULT_RCBA + RCBA_GCS);
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index adcf175d04..45d92d898c 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -135,15 +135,15 @@ void main(unsigned long bist)
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = CONFIG_HPET_ADDRESS,
- .rcba = DEFAULT_RCBABASE,
+ .rcba = (uintptr_t)DEFAULT_RCBABASE,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.thermalbase = 0xfed08000,
diff --git a/src/mainboard/intel/mohonpeak/romstage.c b/src/mainboard/intel/mohonpeak/romstage.c
index ba5091ab51..e06682ccd8 100644
--- a/src/mainboard/intel/mohonpeak/romstage.c
+++ b/src/mainboard/intel/mohonpeak/romstage.c
@@ -32,7 +32,7 @@
static void interrupt_routing_config(void)
{
- u32 ilb_base = pci_read_config32(SOC_LPC_DEV, IBASE) & ~0xf;
+ u8 *ilb_base = (u8 *)(pci_read_config32(SOC_LPC_DEV, IBASE) & ~0xf);
/*
* Initialize Interrupt Routings for each device in ilb_base_address.
diff --git a/src/mainboard/intel/mtarvon/mptable.c b/src/mainboard/intel/mtarvon/mptable.c
index 4dd13f9279..fa07fd7155 100644
--- a/src/mainboard/intel/mtarvon/mptable.c
+++ b/src/mainboard/intel/mtarvon/mptable.c
@@ -42,7 +42,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
- smp_write_ioapic(mc, 0x01, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 0x01, 0x20, VIO_APIC_VADDR);
mptable_add_isa_interrupts(mc, bus_isa, 0x1, 0);
diff --git a/src/mainboard/intel/truxton/mptable.c b/src/mainboard/intel/truxton/mptable.c
index 9ad6ea6d6e..87b40dd525 100644
--- a/src/mainboard/intel/truxton/mptable.c
+++ b/src/mainboard/intel/truxton/mptable.c
@@ -70,7 +70,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
- smp_write_ioapic(mc, 0x8, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 0x8, 0x20, VIO_APIC_VADDR);
mptable_add_isa_interrupts(mc, bus_isa, 0x8, 0);
diff --git a/src/mainboard/iwave/iWRainbowG6/mptable.c b/src/mainboard/iwave/iWRainbowG6/mptable.c
index 87de02288c..218f4f80e6 100644
--- a/src/mainboard/iwave/iWRainbowG6/mptable.c
+++ b/src/mainboard/iwave/iWRainbowG6/mptable.c
@@ -34,7 +34,7 @@ void *smp_write_config_table(void *v)
smp_write_processors(mc);
mptable_write_buses(mc, NULL, &isa_bus);
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x20, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
diff --git a/src/mainboard/iwill/dk8_htx/mptable.c b/src/mainboard/iwill/dk8_htx/mptable.c
index ff6e582006..eecad5cac2 100644
--- a/src/mainboard/iwill/dk8_htx/mptable.c
+++ b/src/mainboard/iwill/dk8_htx/mptable.c
@@ -29,7 +29,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
- smp_write_ioapic(mc, m->apicid_8111, 0x11, IO_APIC_ADDR); //8111
+ smp_write_ioapic(mc, m->apicid_8111, 0x11, VIO_APIC_VADDR); //8111
{
device_t dev;
struct resource *res;
@@ -37,14 +37,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132_1, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132_2, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
@@ -60,14 +62,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11,
+ res2mmio(res, 0, 0));
}
}
break;
diff --git a/src/mainboard/iwill/dk8s2/mptable.c b/src/mainboard/iwill/dk8s2/mptable.c
index c7bb33df34..b460ff7791 100644
--- a/src/mainboard/iwill/dk8s2/mptable.c
+++ b/src/mainboard/iwill/dk8s2/mptable.c
@@ -54,7 +54,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
- smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x11, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -63,7 +63,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x03, 0x11, res->base);
+ smp_write_ioapic(mc, 0x03, 0x11,
+ res2mmio(res, 0, 0));
}
}
/* 8131 apic 4 */
@@ -71,7 +72,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x04, 0x11, res->base);
+ smp_write_ioapic(mc, 0x04, 0x11,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/iwill/dk8x/mptable.c b/src/mainboard/iwill/dk8x/mptable.c
index c7bb33df34..b460ff7791 100644
--- a/src/mainboard/iwill/dk8x/mptable.c
+++ b/src/mainboard/iwill/dk8x/mptable.c
@@ -54,7 +54,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* IOAPIC handling */
- smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x11, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -63,7 +63,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x03, 0x11, res->base);
+ smp_write_ioapic(mc, 0x03, 0x11,
+ res2mmio(res, 0, 0));
}
}
/* 8131 apic 4 */
@@ -71,7 +72,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x04, 0x11, res->base);
+ smp_write_ioapic(mc, 0x04, 0x11,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/jetway/nf81-t56n-lf/mptable.c b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
index 4390605e0d..cc73c835b7 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/mptable.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/mptable.c
@@ -44,8 +44,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
/* Intialize the MP_Table */
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -70,7 +70,7 @@ static void *smp_write_config_table(void *v)
* Type 2: I/O APICs:
* APIC ID, Version, APIC Flags:EN, Address
*/
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
/*
* Type 3: I/O Interrupt Table Entries:
diff --git a/src/mainboard/jetway/pa78vm5/mptable.c b/src/mainboard/jetway/pa78vm5/mptable.c
index 7cabdf1938..e28d05711a 100644
--- a/src/mainboard/jetway/pa78vm5/mptable.c
+++ b/src/mainboard/jetway/pa78vm5/mptable.c
@@ -60,7 +60,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb700 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb700, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb700,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/kontron/986lcd-m/mptable.c b/src/mainboard/kontron/986lcd-m/mptable.c
index 03f737046f..2df0a44fb5 100644
--- a/src/mainboard/kontron/986lcd-m/mptable.c
+++ b/src/mainboard/kontron/986lcd-m/mptable.c
@@ -56,7 +56,7 @@ static void *smp_write_config_table(void *v)
/* I/O APICs: APIC ID Version State Address */
ioapic_id = 2;
- smp_write_ioapic(mc, ioapic_id, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, 0x20, VIO_APIC_VADDR);
/* Legacy Interrupts */
mptable_add_isa_interrupts(mc, isa_bus, ioapic_id, 0);
diff --git a/src/mainboard/kontron/kt690/mptable.c b/src/mainboard/kontron/kt690/mptable.c
index 8b86b023da..45212bef4f 100644
--- a/src/mainboard/kontron/kt690/mptable.c
+++ b/src/mainboard/kontron/kt690/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb600 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb600, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb600,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c
index 31f1b22a0f..22dc33d0d9 100644
--- a/src/mainboard/kontron/ktqm77/romstage.c
+++ b/src/mainboard/kontron/ktqm77/romstage.c
@@ -112,15 +112,15 @@ void main(unsigned long bist)
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = CONFIG_HPET_ADDRESS,
- .rcba = DEFAULT_RCBABASE,
+ .rcba = (uintptr_t)DEFAULT_RCBABASE,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.thermalbase = 0xfed08000,
diff --git a/src/mainboard/lenovo/g505s/mptable.c b/src/mainboard/lenovo/g505s/mptable.c
index 65b1279e47..75730b7201 100644
--- a/src/mainboard/lenovo/g505s/mptable.c
+++ b/src/mainboard/lenovo/g505s/mptable.c
@@ -76,8 +76,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -93,7 +93,7 @@ static void *smp_write_config_table(void *v)
my_smp_write_bus(mc, bus_isa, "ISA ");
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
/* PIC IRQ routine */
for (byte = 0x0; byte < sizeof(picr_data); byte ++) {
diff --git a/src/mainboard/lenovo/t60/mptable.c b/src/mainboard/lenovo/t60/mptable.c
index 744ef30ea3..8a245ccfa8 100644
--- a/src/mainboard/lenovo/t60/mptable.c
+++ b/src/mainboard/lenovo/t60/mptable.c
@@ -41,7 +41,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x20, VIO_APIC_VADDR);
/* Legacy Interrupts */
mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
diff --git a/src/mainboard/lenovo/x200/devicetree.cb b/src/mainboard/lenovo/x200/devicetree.cb
index edd3c64d17..cc27d25944 100644
--- a/src/mainboard/lenovo/x200/devicetree.cb
+++ b/src/mainboard/lenovo/x200/devicetree.cb
@@ -77,7 +77,7 @@ chip northbridge/intel/gm45
register "have_isa_interrupts" = "1"
register "irq_on_fsb" = "1"
register "enable_virtual_wire" = "1"
- register "base" = "0xfec00000"
+ register "base" = "(void *)0xfec00000"
device ioapic 2 on end
end
diff --git a/src/mainboard/lenovo/x60/mptable.c b/src/mainboard/lenovo/x60/mptable.c
index 8ade71b006..9ebb1067f2 100644
--- a/src/mainboard/lenovo/x60/mptable.c
+++ b/src/mainboard/lenovo/x60/mptable.c
@@ -41,7 +41,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x20, VIO_APIC_VADDR);
/* Legacy Interrupts */
mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
diff --git a/src/mainboard/lippert/frontrunner-af/mptable.c b/src/mainboard/lippert/frontrunner-af/mptable.c
index 078601e56f..b7a1862b0e 100644
--- a/src/mainboard/lippert/frontrunner-af/mptable.c
+++ b/src/mainboard/lippert/frontrunner-af/mptable.c
@@ -48,8 +48,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -61,7 +61,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
u8 byte;
diff --git a/src/mainboard/lippert/toucan-af/mptable.c b/src/mainboard/lippert/toucan-af/mptable.c
index 078601e56f..b7a1862b0e 100644
--- a/src/mainboard/lippert/toucan-af/mptable.c
+++ b/src/mainboard/lippert/toucan-af/mptable.c
@@ -48,8 +48,8 @@ static void *smp_write_config_table(void *v)
* have been written so they can be read to get the correct
* APIC ID and Version
*/
- u8 ioapic_id = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24);
- u8 ioapic_ver = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF);
+ u8 ioapic_id = (io_apic_read(VIO_APIC_VADDR, 0x00) >> 24);
+ u8 ioapic_ver = (io_apic_read(VIO_APIC_VADDR, 0x01) & 0xFF);
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -61,7 +61,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
u8 byte;
diff --git a/src/mainboard/msi/ms7135/mptable.c b/src/mainboard/msi/ms7135/mptable.c
index b43a51662b..fb4ae8bba3 100644
--- a/src/mainboard/msi/ms7135/mptable.c
+++ b/src/mainboard/msi/ms7135/mptable.c
@@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
smp_write_ioapic(mc, apicid_ck804, 0x11,
- res->base);
+ res2mmio(res, 0, 0));
}
/* Initialize interrupt mapping */
diff --git a/src/mainboard/msi/ms7260/mptable.c b/src/mainboard/msi/ms7260/mptable.c
index ea003a8306..cbe26aae55 100644
--- a/src/mainboard/msi/ms7260/mptable.c
+++ b/src/mainboard/msi/ms7260/mptable.c
@@ -56,7 +56,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res)
- smp_write_ioapic(mc, apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
dword = 0x43c6c643;
pci_write_config32(dev, 0x7c, dword);
diff --git a/src/mainboard/msi/ms9185/mptable.c b/src/mainboard/msi/ms9185/mptable.c
index b30ab73fbc..6f6e6380b6 100644
--- a/src/mainboard/msi/ms9185/mptable.c
+++ b/src/mainboard/msi/ms9185/mptable.c
@@ -63,7 +63,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, m->apicid_bcm5785[i], 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_bcm5785[i], 0x11,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/msi/ms9282/mptable.c b/src/mainboard/msi/ms9282/mptable.c
index 1764cf358b..b6efdd0a06 100644
--- a/src/mainboard/msi/ms9282/mptable.c
+++ b/src/mainboard/msi/ms9282/mptable.c
@@ -60,7 +60,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, m->apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
}
dword = 0x43c6c643;
diff --git a/src/mainboard/msi/ms9652_fam10/mptable.c b/src/mainboard/msi/ms9652_fam10/mptable.c
index 09a25f29c4..e7184938d2 100644
--- a/src/mainboard/msi/ms9652_fam10/mptable.c
+++ b/src/mainboard/msi/ms9652_fam10/mptable.c
@@ -57,7 +57,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, m->apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
}
dword = 0x43c6c643;
diff --git a/src/mainboard/newisys/khepri/mptable.c b/src/mainboard/newisys/khepri/mptable.c
index 1d7c79e690..7e2e597095 100644
--- a/src/mainboard/newisys/khepri/mptable.c
+++ b/src/mainboard/newisys/khepri/mptable.c
@@ -55,7 +55,7 @@ static void *smp_write_config_table(void *v)
/* IOAPIC handling */
- smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x11, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -64,7 +64,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x03, 0x11, res->base);
+ smp_write_ioapic(mc, 0x03, 0x11,
+ res2mmio(res, 0, 0));
}
}
/* 8131 apic 4 */
@@ -72,7 +73,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x04, 0x11, res->base);
+ smp_write_ioapic(mc, 0x04, 0x11,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/nvidia/l1_2pvv/mptable.c b/src/mainboard/nvidia/l1_2pvv/mptable.c
index e991efdee3..fe6a0950ce 100644
--- a/src/mainboard/nvidia/l1_2pvv/mptable.c
+++ b/src/mainboard/nvidia/l1_2pvv/mptable.c
@@ -57,7 +57,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res)
- smp_write_ioapic(mc, m->apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
/* Initialize interrupt mapping*/
dword = pci_read_config32(dev, 0x74);
@@ -81,7 +82,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res)
- smp_write_ioapic(mc, m->apicid_mcp55b, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_mcp55b, 0x11,
+ res2mmio(res, 0, 0));
dword = 0x43c60000;
pci_write_config32(dev, 0x7c, dword);
diff --git a/src/mainboard/roda/rk886ex/mptable.c b/src/mainboard/roda/rk886ex/mptable.c
index 9b59bb470e..05586b96bf 100644
--- a/src/mainboard/roda/rk886ex/mptable.c
+++ b/src/mainboard/roda/rk886ex/mptable.c
@@ -41,7 +41,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 0x20, VIO_APIC_VADDR);
/* Legacy Interrupts */
mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
diff --git a/src/mainboard/roda/rk9/devicetree.cb b/src/mainboard/roda/rk9/devicetree.cb
index deece864e6..2bd2358e6b 100644
--- a/src/mainboard/roda/rk9/devicetree.cb
+++ b/src/mainboard/roda/rk9/devicetree.cb
@@ -66,7 +66,7 @@ chip northbridge/intel/gm45
register "have_isa_interrupts" = "1"
register "irq_on_fsb" = "1"
register "enable_virtual_wire" = "1"
- register "base" = "0xfec00000"
+ register "base" = "(void *)0xfec00000"
device ioapic 2 on end
end
diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb
index 9b0fc40de9..03726141fb 100644
--- a/src/mainboard/samsung/lumpy/devicetree.cb
+++ b/src/mainboard/samsung/lumpy/devicetree.cb
@@ -112,7 +112,7 @@ chip northbridge/intel/sandybridge
register "have_isa_interrupts" = "1"
register "irq_on_fsb" = "1"
register "enable_virtual_wire" = "1"
- register "base" = "0xfec00000"
+ register "base" = "(void *)0xfec00000"
device ioapic 4 on end
end
end
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c
index a8c1249458..98f5c7d4de 100644
--- a/src/mainboard/samsung/lumpy/romstage.c
+++ b/src/mainboard/samsung/lumpy/romstage.c
@@ -106,15 +106,15 @@ void main(unsigned long bist)
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = CONFIG_HPET_ADDRESS,
- .rcba = DEFAULT_RCBABASE,
+ .rcba = (uintptr_t)DEFAULT_RCBABASE,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.thermalbase = 0xfed08000,
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c
index c5c2095da2..5db877337a 100644
--- a/src/mainboard/samsung/stumpy/romstage.c
+++ b/src/mainboard/samsung/stumpy/romstage.c
@@ -144,15 +144,15 @@ void main(unsigned long bist)
struct pei_data pei_data = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
.epbar = DEFAULT_EPBAR,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
.hpet_address = CONFIG_HPET_ADDRESS,
- .rcba = DEFAULT_RCBABASE,
+ .rcba = (uintptr_t)DEFAULT_RCBABASE,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
.thermalbase = 0xfed08000,
diff --git a/src/mainboard/siemens/sitemp_g1p1/mptable.c b/src/mainboard/siemens/sitemp_g1p1/mptable.c
index de5151d7e7..8cc6c975ef 100644
--- a/src/mainboard/siemens/sitemp_g1p1/mptable.c
+++ b/src/mainboard/siemens/sitemp_g1p1/mptable.c
@@ -55,7 +55,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
struct resource *res;
res = find_resource(dev, 0x74);
- smp_write_ioapic(mc, apicid_sb600, 0x20, res->base);
+ smp_write_ioapic(mc, apicid_sb600, 0x20,
+ res2mmio(res, 0, 0));
}
}
mptable_add_isa_interrupts(mc, isa_bus, apicid_sb600, 0);
diff --git a/src/mainboard/sunw/ultra40/mptable.c b/src/mainboard/sunw/ultra40/mptable.c
index 1ba1dcf316..eeae519b20 100644
--- a/src/mainboard/sunw/ultra40/mptable.c
+++ b/src/mainboard/sunw/ultra40/mptable.c
@@ -57,7 +57,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_ck804, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_ck804, 0x11,
+ res2mmio(res, 0, 0));
}
/* Initialize interrupt mapping*/
@@ -77,14 +78,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
@@ -93,7 +96,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_ck804b, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_ck804b, 0x11,
+ res2mmio(res, 0, 0));
}
dword = 0x0000d218;
diff --git a/src/mainboard/supermicro/h8dme/mptable.c b/src/mainboard/supermicro/h8dme/mptable.c
index 17067edfd4..b301eb941b 100644
--- a/src/mainboard/supermicro/h8dme/mptable.c
+++ b/src/mainboard/supermicro/h8dme/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
}
dword = 0x43c6c643;
diff --git a/src/mainboard/supermicro/h8dmr/mptable.c b/src/mainboard/supermicro/h8dmr/mptable.c
index 11db23f229..9ebcb8762a 100644
--- a/src/mainboard/supermicro/h8dmr/mptable.c
+++ b/src/mainboard/supermicro/h8dmr/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
}
dword = 0x43c6c643;
diff --git a/src/mainboard/supermicro/h8dmr_fam10/mptable.c b/src/mainboard/supermicro/h8dmr_fam10/mptable.c
index 4e2d48c256..9ed01606d4 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/mptable.c
@@ -56,7 +56,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, m->apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
}
dword = 0x43c6c643;
diff --git a/src/mainboard/supermicro/h8qgi/mptable.c b/src/mainboard/supermicro/h8qgi/mptable.c
index 5ec4a35bf1..63ec044811 100644
--- a/src/mainboard/supermicro/h8qgi/mptable.c
+++ b/src/mainboard/supermicro/h8qgi/mptable.c
@@ -35,7 +35,7 @@ static void *smp_write_config_table(void *v)
u32 apicid_sp5100;
u32 apicid_sr5650;
device_t dev;
- u32 dword;
+ u32 *dword;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
@@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set SP5100 IOAPIC ID */
- dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
+ dword = (u32 *)(pci_read_config32(dev, 0x74) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sp5100, 0x20, dword);
#ifdef UNUSED_CODE
@@ -72,8 +72,8 @@ static void *smp_write_config_table(void *v)
pci_write_config8(dev, 0x63, byte);
/* SATA */
dword = pci_read_config32(dev, 0xAC);
- dword &= ~(7 << 26);
- dword |= 6 << 26; /* 0: INTA, ...., 7: INTH */
+ dword = dword & ~(7 << 26);
+ dword = dword | (6 << 26); /* 0: INTA, ...., 7: INTH */
/* dword |= 1<<22; PIC and APIC co exists */
pci_write_config32(dev, 0xAC, dword);
#endif
@@ -96,7 +96,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0, 0));
if (dev) {
pci_write_config32(dev, 0xF8, 0x1);
- dword = pci_read_config32(dev, 0xFC) & 0xfffffff0;
+ dword = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sr5650, 0x20, dword);
}
diff --git a/src/mainboard/supermicro/h8qme_fam10/mptable.c b/src/mainboard/supermicro/h8qme_fam10/mptable.c
index 4fbb4c8c28..a34a5be567 100644
--- a/src/mainboard/supermicro/h8qme_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8qme_fam10/mptable.c
@@ -58,7 +58,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, m->apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
}
dword = 0x00000ab5;
diff --git a/src/mainboard/supermicro/h8scm/mptable.c b/src/mainboard/supermicro/h8scm/mptable.c
index 5ec4a35bf1..a47e190548 100644
--- a/src/mainboard/supermicro/h8scm/mptable.c
+++ b/src/mainboard/supermicro/h8scm/mptable.c
@@ -35,7 +35,7 @@ static void *smp_write_config_table(void *v)
u32 apicid_sp5100;
u32 apicid_sr5650;
device_t dev;
- u32 dword;
+ u32 *dword;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
@@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set SP5100 IOAPIC ID */
- dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
+ dword = (u32 *)(pci_read_config32(dev, 0x74) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sp5100, 0x20, dword);
#ifdef UNUSED_CODE
@@ -71,9 +71,9 @@ static void *smp_write_config_table(void *v)
byte |= 0; /* 0: INTA, ...., 7: INTH */
pci_write_config8(dev, 0x63, byte);
/* SATA */
- dword = pci_read_config32(dev, 0xAC);
- dword &= ~(7 << 26);
- dword |= 6 << 26; /* 0: INTA, ...., 7: INTH */
+ dword = (u32 *)pci_read_config32(dev, 0xAC);
+ dword = dword & ~(7 << 26);
+ dword = dword | (6 << 26); /* 0: INTA, ...., 7: INTH */
/* dword |= 1<<22; PIC and APIC co exists */
pci_write_config32(dev, 0xAC, dword);
#endif
@@ -96,7 +96,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0, 0));
if (dev) {
pci_write_config32(dev, 0xF8, 0x1);
- dword = pci_read_config32(dev, 0xFC) & 0xfffffff0;
+ dword = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sr5650, 0x20, dword);
}
diff --git a/src/mainboard/supermicro/h8scm_fam10/mptable.c b/src/mainboard/supermicro/h8scm_fam10/mptable.c
index 84593fcf0d..860c417dc6 100644
--- a/src/mainboard/supermicro/h8scm_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8scm_fam10/mptable.c
@@ -56,13 +56,13 @@ static void *smp_write_config_table(void *v)
/* I/O APICs: APIC ID Version State Address */
{
device_t dev;
- u32 dword;
+ u32 *dword;
u8 byte;
dev = dev_find_slot(0, //bus_sp5100[0], TODO: why bus_sp5100[0] use same value of bus_sr5650[0] assigned by get_pci1234(), instead of 0.
PCI_DEVFN(sbdn_sp5100 + 0x14, 0));
if (dev) {
- dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
+ dword = (u32 *)(pci_read_config32(dev, 0x74) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sp5100, 0x11, dword);
/* Initialize interrupt mapping */
@@ -73,11 +73,11 @@ static void *smp_write_config_table(void *v)
pci_write_config8(dev, 0x63, byte);
/* SATA */
- dword = pci_read_config32(dev, 0xac);
- dword &= ~(7 << 26);
- dword |= 6 << 26; /* 0: INTA, ...., 7: INTH */
+ dword = (u32 *)((pci_read_config32(dev, 0xac) &
+ ~(7 << 26)) | (6 << 26));
+
/* dword |= 1<<22; PIC and APIC co exists */
- pci_write_config32(dev, 0xac, dword);
+ pci_write_config32(dev, 0xac, (u32)dword);
/*
* 00:12.0: PROG SATA : INT F
@@ -96,7 +96,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0, 0));
if (dev) {
pci_write_config32(dev, 0xF8, 0x1);
- dword = pci_read_config32(dev, 0xFC) & 0xfffffff0;
+ dword = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sp5100+1, 0x11, dword);
}
}
diff --git a/src/mainboard/supermicro/x7db8/romstage.c b/src/mainboard/supermicro/x7db8/romstage.c
index b4364a3c21..53da4b52d0 100644
--- a/src/mainboard/supermicro/x7db8/romstage.c
+++ b/src/mainboard/supermicro/x7db8/romstage.c
@@ -51,7 +51,7 @@ static void early_config(void)
u32 gcs, rpc, fd;
/* Enable RCBA */
- pci_write_config32(PCI_DEV(0, 0x1F, 0), RCBA, DEFAULT_RCBA | 1);
+ pci_write_config32(PCI_DEV(0, 0x1F, 0), RCBA, (uintptr_t)DEFAULT_RCBA | 1);
/* Disable watchdog */
gcs = read32(DEFAULT_RCBA + RCBA_GCS);
@@ -144,7 +144,7 @@ void main(unsigned long bist)
outb(0x03, 0x11b8);
outb(0x01, 0x11b8);
- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xf0, DEFAULT_RCBA | 1);
+ pci_write_config32(PCI_DEV(0, 0x1f, 0), 0xf0, (uintptr_t)DEFAULT_RCBA | 1);
i5000_fbdimm_init();
smbus_write_byte(0x69, 0x01, 0x01);
}
diff --git a/src/mainboard/technexion/tim5690/mptable.c b/src/mainboard/technexion/tim5690/mptable.c
index 8b86b023da..45212bef4f 100644
--- a/src/mainboard/technexion/tim5690/mptable.c
+++ b/src/mainboard/technexion/tim5690/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb600 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb600, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb600,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/technexion/tim8690/mptable.c b/src/mainboard/technexion/tim8690/mptable.c
index 8b86b023da..45212bef4f 100644
--- a/src/mainboard/technexion/tim8690/mptable.c
+++ b/src/mainboard/technexion/tim8690/mptable.c
@@ -59,7 +59,8 @@ static void *smp_write_config_table(void *v)
PCI_DEVFN(sbdn_sb600 + 0x14, 0));
if (dev) {
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
- smp_write_ioapic(mc, apicid_sb600, 0x11, dword);
+ smp_write_ioapic(mc, apicid_sb600,
+ 0x11,(void *) dword);
/* Initialize interrupt mapping */
/* aza */
diff --git a/src/mainboard/thomson/ip1000/mainboard.c b/src/mainboard/thomson/ip1000/mainboard.c
index 726769607a..4fb8056322 100644
--- a/src/mainboard/thomson/ip1000/mainboard.c
+++ b/src/mainboard/thomson/ip1000/mainboard.c
@@ -65,14 +65,14 @@ static void parport_gpios(void)
static void flash_gpios(void)
{
- u8 manufacturer_id = read8(0xffbc0000);
- u8 device_id = read8(0xffbc0001);
+ u8 manufacturer_id = read8((u8 *)0xffbc0000);
+ u8 device_id = read8((u8 *)0xffbc0001);
if ((manufacturer_id == 0x20) &&
((device_id == 0x2c) || (device_id == 0x2d))) {
printk(BIOS_DEBUG, "Detected ST M50FW0%c0 flash:\n",
(device_id==0x2c)?'4':'8');
- u8 fgpi = read8(0xffbc0100);
+ u8 fgpi = read8((u8 *)0xffbc0100);
printk(BIOS_DEBUG, " FGPI0 [%c] FGPI1 [%c] FGPI2 [%c] FGPI3 [%c] FGPI4 [%c]\n",
(fgpi & (1 << 0)) ? 'X' : ' ',
(fgpi & (1 << 1)) ? 'X' : ' ',
diff --git a/src/mainboard/tyan/s2735/mptable.c b/src/mainboard/tyan/s2735/mptable.c
index 907372809f..1d1c2e7615 100644
--- a/src/mainboard/tyan/s2735/mptable.c
+++ b/src/mainboard/tyan/s2735/mptable.c
@@ -17,7 +17,7 @@ static void *smp_write_config_table(void *v)
smp_write_processors(mc);
mptable_write_buses(mc, NULL, &isa_bus);
/*I/O APICs: APIC ID Version State Address*/
- smp_write_ioapic(mc, 8, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 8, 0x20, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -25,14 +25,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x09, 0x20, res->base);
+ smp_write_ioapic(mc, 0x09, 0x20,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(1, PCI_DEVFN(0x1c,0));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, 0x0a, 0x20, res->base);
+ smp_write_ioapic(mc, 0x0a, 0x20,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/tyan/s2850/mptable.c b/src/mainboard/tyan/s2850/mptable.c
index 371d9a3ced..c3fdeef679 100644
--- a/src/mainboard/tyan/s2850/mptable.c
+++ b/src/mainboard/tyan/s2850/mptable.c
@@ -87,7 +87,7 @@ static void *smp_write_config_table(void *v)
#endif
apicid_8111 = apicid_base+0;
- smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, apicid_8111, 0x11, VIO_APIC_VADDR);
mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
diff --git a/src/mainboard/tyan/s2875/mptable.c b/src/mainboard/tyan/s2875/mptable.c
index 90299a746b..c8b12bdb1e 100644
--- a/src/mainboard/tyan/s2875/mptable.c
+++ b/src/mainboard/tyan/s2875/mptable.c
@@ -104,7 +104,7 @@ static void *smp_write_config_table(void *v)
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
apicid_8111 = apicid_base+0;
- smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, apicid_8111, 0x11, VIO_APIC_VADDR);
mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
diff --git a/src/mainboard/tyan/s2880/mptable.c b/src/mainboard/tyan/s2880/mptable.c
index 32fc639dab..10db9bbd57 100644
--- a/src/mainboard/tyan/s2880/mptable.c
+++ b/src/mainboard/tyan/s2880/mptable.c
@@ -117,7 +117,7 @@ static void *smp_write_config_table(void *v)
apicid_8111 = apicid_base+0;
apicid_8131_1 = apicid_base+1;
apicid_8131_2 = apicid_base+2;
- smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, apicid_8111, 0x11, VIO_APIC_VADDR);
{
device_t dev;
@@ -126,14 +126,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x2,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
diff --git a/src/mainboard/tyan/s2881/mptable.c b/src/mainboard/tyan/s2881/mptable.c
index 7df5e874b4..8948b7cb77 100644
--- a/src/mainboard/tyan/s2881/mptable.c
+++ b/src/mainboard/tyan/s2881/mptable.c
@@ -33,7 +33,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
- smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, apicid_8111, 0x11, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -41,14 +41,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
diff --git a/src/mainboard/tyan/s2882/mptable.c b/src/mainboard/tyan/s2882/mptable.c
index 6c0796525f..d29c775e5a 100644
--- a/src/mainboard/tyan/s2882/mptable.c
+++ b/src/mainboard/tyan/s2882/mptable.c
@@ -116,7 +116,7 @@ static void *smp_write_config_table(void *v)
apicid_8131_1 = apicid_base+1;
apicid_8131_2 = apicid_base+2;
- smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, apicid_8111, 0x11, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -124,14 +124,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x2,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
diff --git a/src/mainboard/tyan/s2885/mptable.c b/src/mainboard/tyan/s2885/mptable.c
index 26081c7234..fe0f8d839a 100644
--- a/src/mainboard/tyan/s2885/mptable.c
+++ b/src/mainboard/tyan/s2885/mptable.c
@@ -36,7 +36,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/
- smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR); //8111
+ smp_write_ioapic(mc, apicid_8111, 0x11, VIO_APIC_VADDR); //8111
{
device_t dev;
struct resource *res;
@@ -44,14 +44,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
}
diff --git a/src/mainboard/tyan/s2891/mptable.c b/src/mainboard/tyan/s2891/mptable.c
index cb49434bf0..a8f5157b76 100644
--- a/src/mainboard/tyan/s2891/mptable.c
+++ b/src/mainboard/tyan/s2891/mptable.c
@@ -47,7 +47,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_ck804, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_ck804, 0x11,
+ res2mmio(res, 0, 0));
}
/* Initialize interrupt mapping*/
@@ -67,14 +68,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
diff --git a/src/mainboard/tyan/s2892/mptable.c b/src/mainboard/tyan/s2892/mptable.c
index 882ac69d26..014e3f2ccf 100644
--- a/src/mainboard/tyan/s2892/mptable.c
+++ b/src/mainboard/tyan/s2892/mptable.c
@@ -47,7 +47,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_ck804, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_ck804, 0x11,
+ res2mmio(res, 0, 0));
}
/* Initialize interrupt mapping*/
@@ -67,14 +68,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
diff --git a/src/mainboard/tyan/s2895/mptable.c b/src/mainboard/tyan/s2895/mptable.c
index 20fa92cdfc..1abab1bfc1 100644
--- a/src/mainboard/tyan/s2895/mptable.c
+++ b/src/mainboard/tyan/s2895/mptable.c
@@ -55,7 +55,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_ck804, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_ck804, 0x11,
+ res2mmio(res, 0, 0));
}
/* Initialize interrupt mapping*/
@@ -75,14 +76,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
@@ -91,7 +94,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_ck804b, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_ck804b, 0x11,
+ res2mmio(res, 0, 0));
}
dword = 0x0000d218; // Why does the factory BIOS have 0?
diff --git a/src/mainboard/tyan/s2912/mptable.c b/src/mainboard/tyan/s2912/mptable.c
index 133ce43ead..2163307ac9 100644
--- a/src/mainboard/tyan/s2912/mptable.c
+++ b/src/mainboard/tyan/s2912/mptable.c
@@ -56,7 +56,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, m->apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
}
dword = 0x43c6c643;
diff --git a/src/mainboard/tyan/s2912_fam10/mptable.c b/src/mainboard/tyan/s2912_fam10/mptable.c
index e15387d345..b31730353f 100644
--- a/src/mainboard/tyan/s2912_fam10/mptable.c
+++ b/src/mainboard/tyan/s2912_fam10/mptable.c
@@ -56,7 +56,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, m->apicid_mcp55, 0x11, res->base);
+ smp_write_ioapic(mc, m->apicid_mcp55, 0x11,
+ res2mmio(res, 0, 0));
}
dword = 0x43c6c643;
diff --git a/src/mainboard/tyan/s4880/mptable.c b/src/mainboard/tyan/s4880/mptable.c
index dcc0fd871c..b315c40678 100644
--- a/src/mainboard/tyan/s4880/mptable.c
+++ b/src/mainboard/tyan/s4880/mptable.c
@@ -118,7 +118,7 @@ static void *smp_write_config_table(void *v)
apicid_8131_1 = apicid_base+1;
apicid_8131_2 = apicid_base+2;
- smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, apicid_8111, 0x11, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -126,14 +126,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x2,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
diff --git a/src/mainboard/tyan/s4882/mptable.c b/src/mainboard/tyan/s4882/mptable.c
index 350b55ca04..7bde3495b5 100644
--- a/src/mainboard/tyan/s4882/mptable.c
+++ b/src/mainboard/tyan/s4882/mptable.c
@@ -117,7 +117,7 @@ static void *smp_write_config_table(void *v)
apicid_8111 = apicid_base+0;
apicid_8131_1 = apicid_base+1;
apicid_8131_2 = apicid_base+2;
- smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR);
+ smp_write_ioapic(mc, apicid_8111, 0x11, VIO_APIC_VADDR);
{
device_t dev;
struct resource *res;
@@ -125,14 +125,16 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_1, 0x11,
+ res2mmio(res, 0, 0));
}
}
dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x2,1));
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
- smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_8131_2, 0x11,
+ res2mmio(res, 0, 0));
}
}
diff --git a/src/mainboard/tyan/s8226/mptable.c b/src/mainboard/tyan/s8226/mptable.c
index 5ec4a35bf1..63ec044811 100644
--- a/src/mainboard/tyan/s8226/mptable.c
+++ b/src/mainboard/tyan/s8226/mptable.c
@@ -35,7 +35,7 @@ static void *smp_write_config_table(void *v)
u32 apicid_sp5100;
u32 apicid_sr5650;
device_t dev;
- u32 dword;
+ u32 *dword;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
@@ -59,7 +59,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set SP5100 IOAPIC ID */
- dword = pci_read_config32(dev, 0x74) & 0xfffffff0;
+ dword = (u32 *)(pci_read_config32(dev, 0x74) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sp5100, 0x20, dword);
#ifdef UNUSED_CODE
@@ -72,8 +72,8 @@ static void *smp_write_config_table(void *v)
pci_write_config8(dev, 0x63, byte);
/* SATA */
dword = pci_read_config32(dev, 0xAC);
- dword &= ~(7 << 26);
- dword |= 6 << 26; /* 0: INTA, ...., 7: INTH */
+ dword = dword & ~(7 << 26);
+ dword = dword | (6 << 26); /* 0: INTA, ...., 7: INTH */
/* dword |= 1<<22; PIC and APIC co exists */
pci_write_config32(dev, 0xAC, dword);
#endif
@@ -96,7 +96,7 @@ static void *smp_write_config_table(void *v)
dev = dev_find_slot(0, PCI_DEVFN(0, 0));
if (dev) {
pci_write_config32(dev, 0xF8, 0x1);
- dword = pci_read_config32(dev, 0xFC) & 0xfffffff0;
+ dword = (u32 *)(pci_read_config32(dev, 0xFC) & 0xfffffff0);
smp_write_ioapic(mc, apicid_sr5650, 0x20, dword);
}
diff --git a/src/mainboard/via/epia-m850/devicetree.cb b/src/mainboard/via/epia-m850/devicetree.cb
index 0c21cc8f58..aa2db2a779 100644
--- a/src/mainboard/via/epia-m850/devicetree.cb
+++ b/src/mainboard/via/epia-m850/devicetree.cb
@@ -38,7 +38,7 @@ chip northbridge/via/vx900 # Northbridge
register "have_isa_interrupts" = "0"
register "irq_on_fsb" = "1"
register "enable_virtual_wire" = "1"
- register "base" = "0xfecc0000"
+ register "base" = "(void *)0xfecc0000"
device ioapic 2 on end
end
end
@@ -71,7 +71,7 @@ chip northbridge/via/vx900 # Northbridge
register "have_isa_interrupts" = "1"
register "irq_on_fsb" = "1"
register "enable_virtual_wire" = "1"
- register "base" = "0xfec00000"
+ register "base" = "(void *)0xfec00000"
device ioapic 1 on end
end
#chip drivers/generic/generic # DIMM 0 channel 1
diff --git a/src/mainboard/via/pc2500e/mptable.c b/src/mainboard/via/pc2500e/mptable.c
index f3f8186c61..da84ceb795 100644
--- a/src/mainboard/via/pc2500e/mptable.c
+++ b/src/mainboard/via/pc2500e/mptable.c
@@ -43,7 +43,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address*/
- smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, IO_APIC_ADDR);
+ smp_write_ioapic(mc, VT8237R_APIC_ID, 0x20, VIO_APIC_VADDR);
/* Now, assemble the table. */
mptable_add_isa_interrupts(mc, isa_bus, VT8237R_APIC_ID, 0);
diff --git a/src/mainboard/via/vt8454c/mptable.c b/src/mainboard/via/vt8454c/mptable.c
index fc9cb99ef7..c97701f71f 100644
--- a/src/mainboard/via/vt8454c/mptable.c
+++ b/src/mainboard/via/vt8454c/mptable.c
@@ -41,7 +41,7 @@ static void *smp_write_config_table(void *v)
mptable_write_buses(mc, NULL, &isa_bus);
/* I/O APICs: APIC ID Version State Address */
- smp_write_ioapic(mc, 2, 17, IO_APIC_ADDR);
+ smp_write_ioapic(mc, 2, 17, VIO_APIC_VADDR);
mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0);
diff --git a/src/mainboard/winent/mb6047/mptable.c b/src/mainboard/winent/mb6047/mptable.c
index 26e79ca39a..1a5685f7cd 100644
--- a/src/mainboard/winent/mb6047/mptable.c
+++ b/src/mainboard/winent/mb6047/mptable.c
@@ -41,7 +41,8 @@ static void *smp_write_config_table(void *v)
if (dev) {
res = find_resource(dev, PCI_BASE_ADDRESS_1);
if (res) {
- smp_write_ioapic(mc, apicid_ck804, 0x11, res->base);
+ smp_write_ioapic(mc, apicid_ck804, 0x11,
+ res2mmio(res, 0, 0));
}
/* Initialize interrupt mapping*/