summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/bayleybay_fsp/romstage.c2
-rw-r--r--src/mainboard/siemens/mc_tcu3/romstage.c4
2 files changed, 1 insertions, 5 deletions
diff --git a/src/mainboard/intel/bayleybay_fsp/romstage.c b/src/mainboard/intel/bayleybay_fsp/romstage.c
index 7af782f0f3..56ca33a0c5 100644
--- a/src/mainboard/intel/bayleybay_fsp/romstage.c
+++ b/src/mainboard/intel/bayleybay_fsp/romstage.c
@@ -171,7 +171,7 @@ void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer)
UpdData->AzaliaConfigPtr = (UINT32)&mainboard_AzaliaConfig;
/* Disable 2nd DIMM on Bakersport*/
-#if IS_ENABLED(BOARD_INTEL_BAKERSPORT_FSP)
+#if IS_ENABLED(CONFIG_BOARD_INTEL_BAKERSPORT_FSP)
UpdData->PcdMrcInitSPDAddr2 = 0x00; /* cannot use SPD_ADDR_DISABLED at this point */
#endif
}
diff --git a/src/mainboard/siemens/mc_tcu3/romstage.c b/src/mainboard/siemens/mc_tcu3/romstage.c
index 49483e53e0..1fa78ca3da 100644
--- a/src/mainboard/siemens/mc_tcu3/romstage.c
+++ b/src/mainboard/siemens/mc_tcu3/romstage.c
@@ -172,10 +172,6 @@ void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer)
/* Initialize the Azalia Verb Tables to mainboard specific version */
UpdData->AzaliaConfigPtr = (UINT32)&mainboard_AzaliaConfig;
- /* Disable 2nd DIMM on Bakersport*/
-#if IS_ENABLED(BOARD_INTEL_BAKERSPORT_FSP)
- UpdData->PcdMrcInitSPDAddr2 = 0x00; /* cannot use SPD_ADDR_DISABLED at this point */
-#endif
/* Get SPD data from hardware information block and setup memory down */
/* parameters for FSP accordingly */
hwi_main = get_hwinfo((char*)"hwinfo.hex");