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-rw-r--r--src/mainboard/asrock/h110m/devicetree.cb8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb
index b0756cae1f..e13076e682 100644
--- a/src/mainboard/asrock/h110m/devicetree.cb
+++ b/src/mainboard/asrock/h110m/devicetree.cb
@@ -201,6 +201,14 @@ chip soc/intel/skylake
[PchSerialIoIndexUart2] = PchSerialIoDisabled, \
}"
+ # Set params for PEG 0:1:0
+ register "Peg0MaxLinkWidth" = "Peg0_x16"
+ # Configure PCIe clockgen in PCH
+ # PEG0 uses SRCCLKREQ0 and CLKSRC0
+ register "PcieRpClkReqSupport[0]" = "1"
+ register "PcieRpClkReqNumber[0]" = "0"
+ register "PcieRpClkSrcNumber[0]" = "0"
+
# Enable Root port 6(x1) for LAN.
register "PcieRpEnable[5]" = "1"
# Enable CLKREQ#