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-rw-r--r--src/mainboard/amd/inagua/mainboard.c6
-rw-r--r--src/mainboard/amd/persimmon/mainboard.c6
-rw-r--r--src/mainboard/amd/south_station/mainboard.c6
-rw-r--r--src/mainboard/amd/union_station/mainboard.c6
-rw-r--r--src/mainboard/asrock/e350m1/mainboard.c6
-rw-r--r--src/mainboard/elmex/pcm205400/mainboard.c6
-rw-r--r--src/mainboard/gizmosphere/gizmo/mainboard.c1
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/mainboard.c7
-rw-r--r--src/mainboard/lippert/frontrunner-af/mainboard.c6
-rw-r--r--src/mainboard/lippert/toucan-af/mainboard.c6
-rw-r--r--src/mainboard/pcengines/apu1/gpio_ftns.c17
-rw-r--r--src/mainboard/pcengines/apu1/mainboard.c1
-rw-r--r--src/mainboard/pcengines/apu1/romstage.c10
-rw-r--r--src/mainboard/pcengines/apu2/gpio_ftns.c1
14 files changed, 37 insertions, 48 deletions
diff --git a/src/mainboard/amd/inagua/mainboard.c b/src/mainboard/amd/inagua/mainboard.c
index cf40e262aa..83fe394be7 100644
--- a/src/mainboard/amd/inagua/mainboard.c
+++ b/src/mainboard/amd/inagua/mainboard.c
@@ -13,9 +13,9 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/device.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h> /* Platform Specific Definitions */
static void init_gpios(void)
@@ -63,8 +63,8 @@ static void mainboard_enable(struct device *dev)
* SPD read code has been made generic and moved out of the board
* directory, so the ASF init is being done here.
*/
- pm_iowrite(0x29, 0x80);
- pm_iowrite(0x28, 0x61);
+ pm_write8(0x29, 0x80);
+ pm_write8(0x28, 0x61);
}
struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/amd/persimmon/mainboard.c b/src/mainboard/amd/persimmon/mainboard.c
index 43be863f4d..0e89ffde05 100644
--- a/src/mainboard/amd/persimmon/mainboard.c
+++ b/src/mainboard/amd/persimmon/mainboard.c
@@ -14,11 +14,11 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/device.h>
#include <device/mmio.h>
#include <southbridge/amd/common/amd_pci_util.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
#include <southbridge/amd/cimx/sb800/pci_devs.h>
#include <northbridge/amd/agesa/family14/pci_devs.h>
@@ -139,8 +139,8 @@ static void mainboard_enable(struct device *dev)
* SPD read code has been made generic and moved out of the board
* directory, so the ASF init is being done here.
*/
- pm_iowrite(0x29, 0x80);
- pm_iowrite(0x28, 0x61);
+ pm_write8(0x29, 0x80);
+ pm_write8(0x28, 0x61);
/* Initialize the PIRQ data structures for consumption */
pirq_setup();
diff --git a/src/mainboard/amd/south_station/mainboard.c b/src/mainboard/amd/south_station/mainboard.c
index c6f219662f..9b041e0111 100644
--- a/src/mainboard/amd/south_station/mainboard.c
+++ b/src/mainboard/amd/south_station/mainboard.c
@@ -13,10 +13,10 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h> /* Platform Specific Definitions */
/**
@@ -59,8 +59,8 @@ static void mainboard_enable(struct device *dev)
* SPD read code has been made generic and moved out of the board
* directory, so the ASF init is being done here.
*/
- pm_iowrite(0x29, 0x80);
- pm_iowrite(0x28, 0x61);
+ pm_write8(0x29, 0x80);
+ pm_write8(0x28, 0x61);
}
struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/amd/union_station/mainboard.c b/src/mainboard/amd/union_station/mainboard.c
index e2c0ac7370..d680520d47 100644
--- a/src/mainboard/amd/union_station/mainboard.c
+++ b/src/mainboard/amd/union_station/mainboard.c
@@ -13,9 +13,9 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/device.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h> /* Platform Specific Definitions */
/**********************************************
@@ -31,8 +31,8 @@ static void mainboard_enable(struct device *dev)
* SPD read code has been made generic and moved out of the board
* directory, so the ASF init is being done here.
*/
- pm_iowrite(0x29, 0x80);
- pm_iowrite(0x28, 0x61);
+ pm_write8(0x29, 0x80);
+ pm_write8(0x28, 0x61);
}
struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/asrock/e350m1/mainboard.c b/src/mainboard/asrock/e350m1/mainboard.c
index b83a57f78d..e2f4f2b259 100644
--- a/src/mainboard/asrock/e350m1/mainboard.c
+++ b/src/mainboard/asrock/e350m1/mainboard.c
@@ -13,10 +13,10 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/device.h>
#include <device/mmio.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
/**********************************************
@@ -46,8 +46,8 @@ static void mainboard_enable(struct device *dev)
* SPD read code has been made generic and moved out of the board
* directory, so the ASF init is being done here.
*/
- pm_iowrite(0x29, 0x80);
- pm_iowrite(0x28, 0x61);
+ pm_write8(0x29, 0x80);
+ pm_write8(0x28, 0x61);
}
struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/elmex/pcm205400/mainboard.c b/src/mainboard/elmex/pcm205400/mainboard.c
index 43be863f4d..0e89ffde05 100644
--- a/src/mainboard/elmex/pcm205400/mainboard.c
+++ b/src/mainboard/elmex/pcm205400/mainboard.c
@@ -14,11 +14,11 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/device.h>
#include <device/mmio.h>
#include <southbridge/amd/common/amd_pci_util.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
#include <southbridge/amd/cimx/sb800/pci_devs.h>
#include <northbridge/amd/agesa/family14/pci_devs.h>
@@ -139,8 +139,8 @@ static void mainboard_enable(struct device *dev)
* SPD read code has been made generic and moved out of the board
* directory, so the ASF init is being done here.
*/
- pm_iowrite(0x29, 0x80);
- pm_iowrite(0x28, 0x61);
+ pm_write8(0x29, 0x80);
+ pm_write8(0x28, 0x61);
/* Initialize the PIRQ data structures for consumption */
pirq_setup();
diff --git a/src/mainboard/gizmosphere/gizmo/mainboard.c b/src/mainboard/gizmosphere/gizmo/mainboard.c
index 36fa5f9074..8196922571 100644
--- a/src/mainboard/gizmosphere/gizmo/mainboard.c
+++ b/src/mainboard/gizmosphere/gizmo/mainboard.c
@@ -20,7 +20,6 @@
#include <device/device.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
/**********************************************
diff --git a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
index 3439d2fa4e..0a12c3f66a 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c
@@ -15,7 +15,7 @@
* GNU General Public License for more details.
*/
-
+#include <amdblocks/acpimmio.h>
#include <device/mmio.h>
#include <console/console.h>
#include <device/device.h>
@@ -23,7 +23,6 @@
#include <southbridge/amd/common/amd_pci_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
#include <southbridge/amd/cimx/sb800/pci_devs.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <northbridge/amd/agesa/family14/pci_devs.h>
/***********************************************************
@@ -142,8 +141,8 @@ static void mainboard_enable(struct device *dev)
* SPD read code has been made generic and moved out of the board
* directory, so the ASF init is being done here.
*/
- pm_iowrite(0x29, 0x80);
- pm_iowrite(0x28, 0x61);
+ pm_write8(0x29, 0x80);
+ pm_write8(0x28, 0x61);
/* Initialize the PIRQ data structures for consumption */
pirq_setup();
diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c
index 44d0104e00..ea473c035c 100644
--- a/src/mainboard/lippert/frontrunner-af/mainboard.c
+++ b/src/mainboard/lippert/frontrunner-af/mainboard.c
@@ -14,6 +14,7 @@
*/
#include <stdlib.h>
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@@ -21,7 +22,6 @@
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
#include <vendorcode/amd/cimx/sb800/OEM.h> /* SMBUS0_BASE_ADDRESS */
#include <southbridge/amd/cimx/sb800/gpio_oem.h>
@@ -136,8 +136,8 @@ static void mainboard_enable(struct device *dev)
* SPD read code has been made generic and moved out of the board
* directory, so the ASF init is being done here.
*/
- pm_iowrite(0x29, 0x80);
- pm_iowrite(0x28, 0x61);
+ pm_write8(0x29, 0x80);
+ pm_write8(0x28, 0x61);
}
struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c
index 746b1953f8..b000688da6 100644
--- a/src/mainboard/lippert/toucan-af/mainboard.c
+++ b/src/mainboard/lippert/toucan-af/mainboard.c
@@ -14,13 +14,13 @@
*/
#include <stdlib.h>
+#include <amdblocks/acpimmio.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
#include <vendorcode/amd/cimx/sb800/OEM.h> /* SMBUS0_BASE_ADDRESS */
#include <southbridge/amd/cimx/sb800/gpio_oem.h>
@@ -101,8 +101,8 @@ static void mainboard_enable(struct device *dev)
* SPD read code has been made generic and moved out of the board
* directory, so the ASF init is being done here.
*/
- pm_iowrite(0x29, 0x80);
- pm_iowrite(0x28, 0x61);
+ pm_write8(0x29, 0x80);
+ pm_write8(0x28, 0x61);
}
struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/pcengines/apu1/gpio_ftns.c b/src/mainboard/pcengines/apu1/gpio_ftns.c
index 7a988e7ec6..bedd15a514 100644
--- a/src/mainboard/pcengines/apu1/gpio_ftns.c
+++ b/src/mainboard/pcengines/apu1/gpio_ftns.c
@@ -14,25 +14,18 @@
*/
#include <stdint.h>
+#include <amdblocks/acpimmio.h>
#include <arch/io.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include "gpio_ftns.h"
uintptr_t find_gpio_base(void)
{
- u8 pm_index, pm_data;
- uintptr_t base_addr = 0;
-
- /* Find the ACPImmioAddr base address */
- for (pm_index = 0x27; pm_index > 0x23; pm_index--) {
- outb(pm_index, PM_INDEX);
- pm_data = inb(PM_DATA);
- base_addr <<= 8;
- base_addr |= (u32)pm_data;
- }
+ uintptr_t base_addr;
+ /* Get the ACPIMMIO base address */
+ base_addr = pm_read32(0x24);
base_addr &= 0xFFFFF000;
- return (base_addr);
+ return base_addr;
}
void configure_gpio(uintptr_t base_addr, u32 gpio, u8 iomux_ftn, u8 setting)
diff --git a/src/mainboard/pcengines/apu1/mainboard.c b/src/mainboard/pcengines/apu1/mainboard.c
index 088c839239..1c302912a9 100644
--- a/src/mainboard/pcengines/apu1/mainboard.c
+++ b/src/mainboard/pcengines/apu1/mainboard.c
@@ -21,7 +21,6 @@
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/common/amd_pci_util.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <smbios.h>
#include <string.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
diff --git a/src/mainboard/pcengines/apu1/romstage.c b/src/mainboard/pcengines/apu1/romstage.c
index ab48943c55..89bf3049d6 100644
--- a/src/mainboard/pcengines/apu1/romstage.c
+++ b/src/mainboard/pcengines/apu1/romstage.c
@@ -15,8 +15,8 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct5104d/nct5104d.h>
#include "gpio_ftns.h"
@@ -33,16 +33,16 @@ static void early_lpc_init(void)
* controlled in PM_REG 5Bh register. "Always Power On" works by writing a
* value of 05h.
*/
- u8 bdata = pm_ioread(SB_PMIOA_REG5B);
+ u8 bdata = pm_read8(SB_PMIOA_REG5B);
bdata &= 0xf8; //clear bits 0-2
bdata |= 0x05; //set bits 0,2
- pm_iowrite(SB_PMIOA_REG5B, bdata);
+ pm_write8(SB_PMIOA_REG5B, bdata);
/* Multi-function pins switch to GPIO0-35, these pins are shared with PCI pins */
- bdata = pm_ioread(SB_PMIOA_REGEA);
+ bdata = pm_read8(SB_PMIOA_REGEA);
bdata &= 0xfe; //clear bit 0
bdata |= 0x01; //set bit 0
- pm_iowrite(SB_PMIOA_REGEA, bdata);
+ pm_write8(SB_PMIOA_REGEA, bdata);
//configure required GPIOs
mmio_base = find_gpio_base();
diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.c b/src/mainboard/pcengines/apu2/gpio_ftns.c
index a1e2e51952..249ecc3494 100644
--- a/src/mainboard/pcengines/apu2/gpio_ftns.c
+++ b/src/mainboard/pcengines/apu2/gpio_ftns.c
@@ -15,7 +15,6 @@
#include <stdint.h>
#include <device/mmio.h>
-#include <southbridge/amd/cimx/cimx_util.h>
#include <FchPlatform.h>
#include "gpio_ftns.h"
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-30 22:40:59 +0000