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-rw-r--r--src/mainboard/google/chell/devicetree.cb4
-rw-r--r--src/mainboard/google/eve/devicetree.cb75
-rw-r--r--src/mainboard/google/fizz/devicetree.cb40
-rw-r--r--src/mainboard/google/glados/devicetree.cb4
-rw-r--r--src/mainboard/google/lars/devicetree.cb4
-rw-r--r--src/mainboard/google/octopus/variants/baseboard/devicetree.cb73
-rw-r--r--src/mainboard/google/octopus/variants/bip/devicetree.cb73
-rw-r--r--src/mainboard/google/poppy/variants/atlas/devicetree.cb84
-rw-r--r--src/mainboard/google/poppy/variants/baseboard/devicetree.cb111
-rw-r--r--src/mainboard/google/poppy/variants/nami/devicetree.cb100
-rw-r--r--src/mainboard/google/poppy/variants/nautilus/devicetree.cb132
-rw-r--r--src/mainboard/google/poppy/variants/nocturne/devicetree.cb95
-rw-r--r--src/mainboard/google/poppy/variants/soraka/devicetree.cb113
-rw-r--r--src/mainboard/google/reef/variants/baseboard/devicetree.cb73
-rw-r--r--src/mainboard/google/reef/variants/coral/devicetree.cb73
-rw-r--r--src/mainboard/google/reef/variants/pyro/devicetree.cb58
-rw-r--r--src/mainboard/google/reef/variants/sand/devicetree.cb71
-rw-r--r--src/mainboard/google/reef/variants/snappy/devicetree.cb71
-rw-r--r--src/mainboard/google/zoombini/variants/baseboard/devicetree.cb19
-rw-r--r--src/mainboard/google/zoombini/variants/meowth/devicetree.cb32
-rw-r--r--src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb19
-rw-r--r--src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb17
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb4
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb4
-rw-r--r--src/mainboard/intel/kunimitsu/devicetree.cb4
-rw-r--r--src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb4
-rw-r--r--src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb4
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb13
28 files changed, 778 insertions, 596 deletions
diff --git a/src/mainboard/google/chell/devicetree.cb b/src/mainboard/google/chell/devicetree.cb
index fa1fde4d94..4ad8036cfa 100644
--- a/src/mainboard/google/chell/devicetree.cb
+++ b/src/mainboard/google/chell/devicetree.cb
@@ -189,7 +189,9 @@ chip soc/intel/skylake
register "SendVrMbxCmd" = "1"
# Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT
+ }"
device cpu_cluster 0 on
device lapic 0 on end
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb
index fa12d8b06d..a812c0814f 100644
--- a/src/mainboard/google/eve/devicetree.cb
+++ b/src/mainboard/google/eve/devicetree.cb
@@ -169,46 +169,60 @@ chip soc/intel/skylake
register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Empty
register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
+ #| I2C0 | Touchscreen |
+ #| I2C1 | Early TPM access |
+ #| I2C2 | Touchpad |
+ #| I2C4 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST_PLUS,
+ .rise_time_ns = 98,
+ .fall_time_ns = 38,
+ },
+ .i2c[1] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 112,
+ .fall_time_ns = 34,
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 186,
+ .scl_hcnt = 93,
+ .sda_hold = 36,
+ }
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 176,
+ .scl_hcnt = 95,
+ .sda_hold = 36,
+ }
+ },
+ }"
+
# Touchscreen
register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST_PLUS,
- .rise_time_ns = 98,
- .fall_time_ns = 38,
- }"
# Enable I2C1 bus early for TPM access
register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3"
- register "i2c[1]" = "{
- .early_init = 1,
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 112,
- .fall_time_ns = 34,
- }"
# Touchpad
register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8"
- register "i2c[2]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 186,
- .scl_hcnt = 93,
- .sda_hold = 36,
- }
- }"
# Audio
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
- register "i2c[4]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 176,
- .scl_hcnt = 95,
- .sda_hold = 36,
- }
- }"
# Must leave UART0 enabled or SD/eMMC will not work as PCI
register "SerialIoDevMode" = "{
@@ -230,9 +244,6 @@ chip soc/intel/skylake
register "tdp_pl2_override" = "15"
register "tcc_offset" = "10"
- # Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
-
device cpu_cluster 0 on
device lapic 0 on end
end
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index 6418c7ddc1..67828d1ffd 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -275,21 +275,32 @@ chip soc/intel/skylake
register "i2c_voltage[2]" = "I2C_VOLTAGE_3V3" # Debug
register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" # Audio
- # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM
- # communication before memory is up.
- register "gspi[0]" = "{
- .speed_mhz = 1,
- .early_init = 1,
- }"
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C5 | Audio |
+ #+-------------------+---------------------------+
- # audio
- register "i2c[5]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ .i2c[5] = {
.speed = I2C_SPEED_FAST,
- .scl_lcnt = 194,
- .scl_hcnt = 100,
- .sda_hold = 36,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 194,
+ .scl_hcnt = 100,
+ .sda_hold = 36,
+ },
},
}"
@@ -316,9 +327,6 @@ chip soc/intel/skylake
# Use default SD card detect GPIO configuration
register "sdcard_cd_gpio_default" = "GPP_A7"
- # Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
-
device cpu_cluster 0 on
device lapic 0 on end
end
diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb
index 19c9beb7f4..386e3dbb6d 100644
--- a/src/mainboard/google/glados/devicetree.cb
+++ b/src/mainboard/google/glados/devicetree.cb
@@ -187,7 +187,9 @@ chip soc/intel/skylake
register "SendVrMbxCmd" = "1"
# Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ }"
device cpu_cluster 0 on
device lapic 0 on end
diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb
index c860569c9b..6bb460ae3c 100644
--- a/src/mainboard/google/lars/devicetree.cb
+++ b/src/mainboard/google/lars/devicetree.cb
@@ -184,7 +184,9 @@ chip soc/intel/skylake
register "SendVrMbxCmd" = "2"
# Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ }"
device cpu_cluster 0 on
device lapic 0 on end
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
index 1411a7c13d..9bd51ca35c 100644
--- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb
@@ -54,40 +54,45 @@ chip soc/intel/apollolake
register "hdaudio_pwr_gate_enable" = "1"
register "hdaudio_bios_config_lockdown" = "1"
- # digitizer at 400kHz
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 152,
- .fall_time_ns = 30,
- }"
-
- # Enable I2C5 for audio codec at 400kHz
- register "i2c[5]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 104,
- .fall_time_ns = 52,
- }"
-
- # trackpad at 400kHz
- register "i2c[6]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 114,
- .fall_time_ns = 164,
- .data_hold_time_ns = 350,
- }"
-
- # touchscreen at 400kHz
- register "i2c[7]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 76,
- .fall_time_ns = 164,
- }"
-
- # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM
- # communication before memory is up.
- register "gspi[0]" = "{
- .speed_mhz = 1,
- .early_init = 1,
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C0 | Digitizer |
+ #| I2C5 | Audio |
+ #| I2C6 | Trackpad |
+ #| I2C7 | Touchscreen |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 152,
+ .fall_time_ns = 30,
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ },
+ .i2c[6] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 114,
+ .fall_time_ns = 164,
+ .data_hold_time_ns = 350,
+ },
+ .i2c[7] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 76,
+ .fall_time_ns = 164,
+ },
}"
register "pnp_settings" = "PNP_PERF_POWER"
diff --git a/src/mainboard/google/octopus/variants/bip/devicetree.cb b/src/mainboard/google/octopus/variants/bip/devicetree.cb
index 277cb764f0..339b5bfcb1 100644
--- a/src/mainboard/google/octopus/variants/bip/devicetree.cb
+++ b/src/mainboard/google/octopus/variants/bip/devicetree.cb
@@ -54,40 +54,45 @@ chip soc/intel/apollolake
register "hdaudio_pwr_gate_enable" = "1"
register "hdaudio_bios_config_lockdown" = "1"
- # digitizer at 400kHz
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 152,
- .fall_time_ns = 30,
- }"
-
- # Enable I2C5 for audio codec at 400kHz
- register "i2c[5]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 104,
- .fall_time_ns = 52,
- }"
-
- # trackpad at 400kHz
- register "i2c[6]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 114,
- .fall_time_ns = 164,
- .data_hold_time_ns = 350,
- }"
-
- # touchscreen at 400kHz
- register "i2c[7]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 76,
- .fall_time_ns = 164,
- }"
-
- # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM
- # communication before memory is up.
- register "gspi[0]" = "{
- .speed_mhz = 1,
- .early_init = 1,
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C0 | Digitizer |
+ #| I2C5 | Audio |
+ #| I2C6 | Trackpad |
+ #| I2C7 | Touchscreen |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 152,
+ .fall_time_ns = 30,
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ },
+ .i2c[6] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 114,
+ .fall_time_ns = 164,
+ .data_hold_time_ns = 350,
+ },
+ .i2c[7] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 76,
+ .fall_time_ns = 164,
+ },
}"
register "pnp_settings" = "PNP_PERF_POWER"
diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
index 64e7113adc..7742a83485 100644
--- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb
@@ -66,7 +66,6 @@ chip soc/intel/skylake
register "psys_pmax" = "45"
register "tcc_offset" = "10"
register "pch_trip_temp" = "75"
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
register "pirqa_routing" = "PCH_IRQ11"
register "pirqb_routing" = "PCH_IRQ10"
@@ -175,51 +174,66 @@ chip soc/intel/skylake
register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Empty
register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C0 | Touchscreen |
+ #| I2C2 | Trackpad |
+ #| I2C3 | Camera |
+ #| I2C4 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 98,
+ .fall_time_ns = 38,
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 186,
+ .scl_hcnt = 93,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 98,
+ .fall_time_ns = 38,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 176,
+ .scl_hcnt = 95,
+ .sda_hold = 36,
+ }
+ },
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ }"
# Touchscreen
register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 98,
- .fall_time_ns = 38,
- }"
# Trackpad
register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8"
- register "i2c[2]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 186,
- .scl_hcnt = 93,
- .sda_hold = 36,
- },
- }"
# Camera
register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8"
- register "i2c[3]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 98,
- .fall_time_ns = 38,
- }"
# Audio
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
- register "i2c[4]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 176,
- .scl_hcnt = 95,
- .sda_hold = 36,
- }
- }"
-
- # GSPI0 for cr50 TPM
- register "gspi[0]" = "{
- .speed_mhz = 1,
- .early_init = 1,
- }"
register "SerialIoDevMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
index 8ea5c2da2b..6fe949ffc2 100644
--- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb
@@ -170,71 +170,85 @@ chip soc/intel/skylake
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port
register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty
- # Touchscreen
- register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
+ #| I2C0 | Touchscreen |
+ #| I2C1 | H1 |
+ #| I2C2 | Camera |
+ #| I2C3 | Pen |
+ #| I2C4 | Camera |
+ #| I2C5 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ .i2c[0] = {
.speed = I2C_SPEED_FAST,
- .scl_lcnt = 185,
- .scl_hcnt = 90,
- .sda_hold = 36,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 185,
+ .scl_hcnt = 90,
+ .sda_hold = 36,
+ },
},
- }"
-
- # H1
- register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3"
- register "i2c[1]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
+ .i2c[1] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 190,
+ .scl_hcnt = 100,
+ .sda_hold = 36,
+ },
+ .early_init = 1,
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 190,
+ .scl_hcnt = 97,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[4] = {
.speed = I2C_SPEED_FAST,
- .scl_lcnt = 190,
- .scl_hcnt = 100,
- .sda_hold = 36,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 190,
+ .scl_hcnt = 97,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 190,
+ .scl_hcnt = 98,
+ .sda_hold = 36,
+ },
},
- .early_init = 1,
}"
+ # Touchscreen
+ register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
+
+ # H1
+ register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3"
# Camera
register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8"
- register "i2c[2]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 190,
- .scl_hcnt = 97,
- .sda_hold = 36,
- },
- }"
# Pen
register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8"
# Camera
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
- register "i2c[4]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 190,
- .scl_hcnt = 97,
- .sda_hold = 36,
- },
- }"
# Audio
register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8"
- register "i2c[5]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 190,
- .scl_hcnt = 98,
- .sda_hold = 36,
- },
- }"
-
# Must leave UART0 enabled or SD/eMMC will not work as PCI
register "SerialIoDevMode" = "{
@@ -260,9 +274,6 @@ chip soc/intel/skylake
# Use default SD card detect GPIO configuration
register "sdcard_cd_gpio_default" = "GPP_E15"
- # Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
-
# PCH Trip Temperature in degree C
register "pch_trip_temp" = "75"
diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb
index 0c4a8e8802..fdbe6ffc75 100644
--- a/src/mainboard/google/poppy/variants/nami/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb
@@ -196,58 +196,73 @@ chip soc/intel/skylake
# Touchscreen
register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 185,
- .scl_hcnt = 90,
- .sda_hold = 36,
- },
- }"
# Trackpad
register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3"
- register "i2c[1]" = "{
- .early_init = 1,
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 185,
- .scl_hcnt = 90,
- .sda_hold = 36,
- },
- }"
# Pen
register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8"
- register "i2c[2]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 185,
- .scl_hcnt = 100,
- .sda_hold = 36,
- },
- }"
# Audio
register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8"
- register "i2c[3]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
+
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C0 | Touchscreen |
+ #| I2C1 | Trackpad |
+ #| I2C2 | Pen |
+ #| I2C3 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ .i2c[0] = {
.speed = I2C_SPEED_FAST,
- .scl_lcnt = 195,
- .scl_hcnt = 90,
- .sda_hold = 36,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 185,
+ .scl_hcnt = 90,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[1] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 185,
+ .scl_hcnt = 90,
+ .sda_hold = 36,
+ },
+ .early_init = 1,
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 185,
+ .scl_hcnt = 100,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 195,
+ .scl_hcnt = 90,
+ .sda_hold = 36,
+ },
},
- }"
-
- # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM
- # communication before memory is up.
- register "gspi[0]" = "{
- .speed_mhz = 1,
- .early_init = 1,
}"
# Must leave UART0 enabled or SD/eMMC will not work as PCI
@@ -270,9 +285,6 @@ chip soc/intel/skylake
register "tcc_offset" = "10" # TCC of 90C
register "psys_pmax" = "101"
- # Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
-
# PCH Trip Temperature in degree C
register "pch_trip_temp" = "75"
diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
index 7cf764e755..39d7353f58 100644
--- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb
@@ -179,80 +179,97 @@ chip soc/intel/skylake
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port
register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty
- # Touchscreen
- register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
+ #| I2C0 | Touchscreen |
+ #| I2C1 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C2 | Trackpad |
+ #| I2C3 | Pen |
+ #| I2C4 | Camera |
+ #| I2C5 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 180,
+ .scl_hcnt = 90,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[1] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 185,
+ .scl_hcnt = 90,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 190,
+ .scl_hcnt = 100,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[3] = {
.speed = I2C_SPEED_FAST,
- .scl_lcnt = 180,
- .scl_hcnt = 90,
- .sda_hold = 36,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 185,
+ .scl_hcnt = 90,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 190,
+ .scl_hcnt = 100,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 190,
+ .scl_hcnt = 100,
+ .sda_hold = 36,
+ },
},
}"
+ # Touch Screen
+ register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
+
# H1
register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3"
- # Configure I2C1 for cr50 TPM. Early init is required to set up a BAR
- # for TPM communication before memory is up.
- register "i2c[1]" = "{
- .early_init = 1,
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 185,
- .scl_hcnt = 90,
- .sda_hold = 36,
- },
- }"
# Trackpad
register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8"
- register "i2c[2]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 190,
- .scl_hcnt = 100,
- .sda_hold = 36,
- },
- }"
# Pen
register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8"
- register "i2c[3]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 185,
- .scl_hcnt = 90,
- .sda_hold = 36,
- },
- }"
# Camera
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
- register "i2c[4]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 190,
- .scl_hcnt = 100,
- .sda_hold = 36,
- },
- }"
# Audio
register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8"
- register "i2c[5]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 190,
- .scl_hcnt = 100,
- .sda_hold = 36,
- },
- }"
# Must leave UART0 enabled or SD/eMMC will not work as PCI
register "SerialIoDevMode" = "{
@@ -278,9 +295,6 @@ chip soc/intel/skylake
# Use default SD card detect GPIO configuration
register "sdcard_cd_gpio_default" = "GPP_E15"
- # Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
-
# PCH Trip Temperature in degree C
register "pch_trip_temp" = "75"
diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
index 78edcc9faf..5b4c924296 100644
--- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
@@ -66,7 +66,6 @@ chip soc/intel/skylake
register "psys_pmax" = "45"
register "tcc_offset" = "10"
register "pch_trip_temp" = "75"
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
register "pirqa_routing" = "PCH_IRQ11"
register "pirqb_routing" = "PCH_IRQ10"
@@ -176,59 +175,75 @@ chip soc/intel/skylake
register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Empty
register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C0 | Touchscreen |
+ #| I2C1 | Trackpad |
+ #| I2C3 | Camera |
+ #| I2C4 | Audio |
+ #| I2C5 | Rear Camera & SAR |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 98,
+ .fall_time_ns = 38,
+ },
+ .i2c[1] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 186,
+ .scl_hcnt = 93,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 98,
+ .fall_time_ns = 38,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 176,
+ .scl_hcnt = 95,
+ .sda_hold = 36,
+ }
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 98,
+ .fall_time_ns = 38,
+ },
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ }"
# Touchscreen
register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 98,
- .fall_time_ns = 38,
- }"
# Trackpad
register "i2c_voltage[1]" = "I2C_VOLTAGE_1V8"
- register "i2c[1]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 186,
- .scl_hcnt = 93,
- .sda_hold = 36,
- },
- }"
# Front Camera
register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8"
- register "i2c[3]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 98,
- .fall_time_ns = 38,
- }"
# Audio
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
- register "i2c[4]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 176,
- .scl_hcnt = 95,
- .sda_hold = 36,
- }
- }"
# Rear Camera & SAR
register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8"
- register "i2c[5]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 98,
- .fall_time_ns = 38,
- }"
-
- # GSPI0 for cr50 TPM
- register "gspi[0]" = "{
- .speed_mhz = 1,
- .early_init = 1,
- }"
register "SerialIoDevMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
index af962881d8..762955df44 100644
--- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb
@@ -170,68 +170,86 @@ chip soc/intel/skylake
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port
register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty
- # Touchscreen
- register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
+ #| I2C0 | Touchscreen |
+ #| I2C1 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C2 | Camera |
+ #| I2C4 | Camera |
+ #| I2C5 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 180,
+ .scl_hcnt = 85,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[1] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 190,
+ .scl_hcnt = 90,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[2] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 192,
+ .scl_hcnt = 90,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 190,
+ .scl_hcnt = 90,
+ .sda_hold = 36,
+ },
+ },
+ .i2c[5] = {
.speed = I2C_SPEED_FAST,
- .scl_lcnt = 180,
- .scl_hcnt = 85,
- .sda_hold = 36,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 190,
+ .scl_hcnt = 90,
+ .sda_hold = 36,
+ },
},
}"
+ # Touchscreen
+ register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
+
# H1
- register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3"
# Configure I2C1 for cr50 TPM. Early init is required to set up a BAR
# for TPM communication before memory is up.
- register "i2c[1]" = "{
- .early_init = 1,
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 190,
- .scl_hcnt = 90,
- .sda_hold = 36,
- },
- }"
+ register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3"
# Camera
register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8"
- register "i2c[2]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 192,
- .scl_hcnt = 90,
- .sda_hold = 36,
- },
- }"
# Camera
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
- register "i2c[4]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 190,
- .scl_hcnt = 90,
- .sda_hold = 36,
- },
- }"
# Audio
register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8"
- register "i2c[5]" = "{
- .speed = I2C_SPEED_FAST,
- .speed_config[0] = {
- .speed = I2C_SPEED_FAST,
- .scl_lcnt = 190,
- .scl_hcnt = 90,
- .sda_hold = 36,
- },
- }"
# Must leave UART0 enabled or SD/eMMC will not work as PCI
register "SerialIoDevMode" = "{
@@ -257,9 +275,6 @@ chip soc/intel/skylake
# Use default SD card detect GPIO configuration
register "sdcard_cd_gpio_default" = "GPP_E15"
- # Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
-
# PCH Trip Temperature in degree C
register "pch_trip_temp" = "75"
diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
index da47d42d32..da842ba6e6 100644
--- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb
@@ -76,41 +76,44 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_63_32"
register "gpe0_dw3" = "PMC_GPE_SW_31_0"
- # Enable I2C0 for audio codec at 400kHz
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 104,
- .fall_time_ns = 52,
- }"
-
- # Enable I2C2 bus early for TPM at 400kHz
- register "i2c[2]" = "{
- .early_init = 1,
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 57,
- .fall_time_ns = 28,
- }"
-
- # touchscreen at 400kHz
- register "i2c[3]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 76,
- .fall_time_ns = 164,
- }"
-
- # trackpad at 400kHz
- register "i2c[4]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 114,
- .fall_time_ns = 164,
- .data_hold_time_ns = 350,
- }"
-
- # digitizer at 400kHz
- register "i2c[5]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 152,
- .fall_time_ns = 30,
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| I2C0 | Audio |
+ #| I2C2 | TPM |
+ #| I2C3 | Touchscreen |
+ #| I2C4 | Trackpad |
+ #| I2C5 | Digitizer |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ },
+ .i2c[2] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 57,
+ .fall_time_ns = 28,
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 76,
+ .fall_time_ns = 164,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 114,
+ .fall_time_ns = 164,
+ .data_hold_time_ns = 350,
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 152,
+ .fall_time_ns = 30,
+ },
}"
# Minimum SLP S3 assertion width 28ms.
diff --git a/src/mainboard/google/reef/variants/coral/devicetree.cb b/src/mainboard/google/reef/variants/coral/devicetree.cb
index c1b7067711..1608343d3c 100644
--- a/src/mainboard/google/reef/variants/coral/devicetree.cb
+++ b/src/mainboard/google/reef/variants/coral/devicetree.cb
@@ -76,41 +76,44 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_63_32"
register "gpe0_dw3" = "PMC_GPE_SW_31_0"
- # Enable I2C0 for audio codec at 400kHz
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 104,
- .fall_time_ns = 52,
- }"
-
- # Enable I2C2 bus early for TPM at 400kHz
- register "i2c[2]" = "{
- .early_init = 1,
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 57,
- .fall_time_ns = 28,
- }"
-
- # touchscreen at 400kHz
- register "i2c[3]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 76,
- .fall_time_ns = 164,
- }"
-
- # trackpad at 400kHz
- register "i2c[4]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 114,
- .fall_time_ns = 164,
- .data_hold_time_ns = 350,
- }"
-
- # digitizer at 400kHz
- register "i2c[5]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 152,
- .fall_time_ns = 30,
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| I2C0 | Audio |
+ #| I2C2 | TPM |
+ #| I2C3 | Touchscreen |
+ #| I2C4 | Trackpad |
+ #| I2C5 | Digitizer |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ },
+ .i2c[2] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 57,
+ .fall_time_ns = 28,
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 76,
+ .fall_time_ns = 164,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 114,
+ .fall_time_ns = 164,
+ .data_hold_time_ns = 350,
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 152,
+ .fall_time_ns = 30,
+ },
}"
# Minimum SLP S3 assertion width 28ms.
diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb
index cb297d9dce..c2d67aa17e 100644
--- a/src/mainboard/google/reef/variants/pyro/devicetree.cb
+++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb
@@ -76,33 +76,37 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_63_32"
register "gpe0_dw3" = "PMC_GPE_SW_31_0"
- # Enable I2C0 for audio codec at 400kHz
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 104,
- .fall_time_ns = 52,
- }"
-
- # Enable I2C2 bus early for TPM at 400kHz
- register "i2c[2]" = "{
- .early_init = 1,
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 50,
- .fall_time_ns = 23,
- }"
-
- # touchscreen at 400kHz
- register "i2c[3]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 76,
- .fall_time_ns = 164,
- }"
-
- # trackpad at 400kHz
- register "i2c[4]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 90,
- .fall_time_ns = 164,
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| I2C0 | Audio |
+ #| I2C2 | TPM |
+ #| I2C3 | Touchscreen |
+ #| I2C4 | Trackpad |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ },
+ .i2c[2] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 50,
+ .fall_time_ns = 23,
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 76,
+ .fall_time_ns = 164,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 90,
+ .fall_time_ns = 164,
+ },
}"
# Minimum SLP S3 assertion width 28ms.
diff --git a/src/mainboard/google/reef/variants/sand/devicetree.cb b/src/mainboard/google/reef/variants/sand/devicetree.cb
index 16889bb8c9..68f33ae074 100644
--- a/src/mainboard/google/reef/variants/sand/devicetree.cb
+++ b/src/mainboard/google/reef/variants/sand/devicetree.cb
@@ -73,40 +73,43 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_63_32"
register "gpe0_dw3" = "PMC_GPE_SW_31_0"
- # Enable I2C0 for audio codec at 400kHz
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 104,
- .fall_time_ns = 52,
- }"
-
- # Enable I2C2 bus early for TPM at 400kHz
- register "i2c[2]" = "{
- .early_init = 1,
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 57,
- .fall_time_ns = 28,
- }"
-
- # touchscreen at 400kHz
- register "i2c[3]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 76,
- .fall_time_ns = 164,
- }"
-
- # trackpad at 400kHz
- register "i2c[4]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 114,
- .fall_time_ns = 164,
- }"
-
- # digitizer at 400kHz
- register "i2c[5]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 152,
- .fall_time_ns = 30,
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| I2C0 | Audio |
+ #| I2C2 | TPM |
+ #| I2C3 | Touchscreen |
+ #| I2C4 | Trackpad |
+ #| I2C5 | Digitizer |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ },
+ .i2c[2] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 57,
+ .fall_time_ns = 28,
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 76,
+ .fall_time_ns = 164,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 114,
+ .fall_time_ns = 164,
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 152,
+ .fall_time_ns = 30,
+ },
}"
# Minimum SLP S3 assertion width 28ms.
diff --git a/src/mainboard/google/reef/variants/snappy/devicetree.cb b/src/mainboard/google/reef/variants/snappy/devicetree.cb
index 9719368080..aaf61de6ae 100644
--- a/src/mainboard/google/reef/variants/snappy/devicetree.cb
+++ b/src/mainboard/google/reef/variants/snappy/devicetree.cb
@@ -76,40 +76,43 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_63_32"
register "gpe0_dw3" = "PMC_GPE_SW_31_0"
- # Enable I2C0 for audio codec at 400kHz
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 44,
- .fall_time_ns = 22,
- }"
-
- # Enable I2C2 bus early for TPM at 400kHz
- register "i2c[2]" = "{
- .early_init = 1,
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 40,
- .fall_time_ns = 20,
- }"
-
- # touchscreen at 400kHz
- register "i2c[3]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 70,
- .fall_time_ns = 164,
- }"
-
- # trackpad at 400kHz
- register "i2c[4]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 20,
- .fall_time_ns = 164,
- }"
-
- # digitizer at 400kHz
- register "i2c[5]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 152,
- .fall_time_ns = 30,
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| I2C0 | Audio |
+ #| I2C2 | TPM |
+ #| I2C3 | Touchscreen |
+ #| I2C4 | Trackpad |
+ #| I2C5 | Digitizer |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 44,
+ .fall_time_ns = 22,
+ },
+ .i2c[2] = {
+ .early_init = 1,
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 40,
+ .fall_time_ns = 20,
+ },
+ .i2c[3] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 70,
+ .fall_time_ns = 164,
+ },
+ .i2c[4] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 20,
+ .fall_time_ns = 164,
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 152,
+ .fall_time_ns = 30,
+ },
}"
# Minimum SLP S3 assertion width 28ms.
diff --git a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb
index 6f70dfba2a..479f28015a 100644
--- a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb
@@ -25,11 +25,20 @@ chip soc/intel/cannonlake
register "ScsEmmcHs400Enabled" = "1"
register "ScsSdCardEnabled" = "1"
- # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM
- # communication before memory is up.
- register "gspi[0]" = "{
- .speed_mhz = 1,
- .early_init = 1,
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
}"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"
diff --git a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
index 7d89b78e8b..adeedea701 100644
--- a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
+++ b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb
@@ -34,11 +34,26 @@ chip soc/intel/cannonlake
register "ScsEmmcHs400Enabled" = "1"
register "ScsSdCardEnabled" = "1"
- # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM
- # communication before memory is up.
- register "gspi[0]" = "{
- .speed_mhz = 1,
- .early_init = 1,
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C0 | Touchscreen Digitizer |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST_PLUS,
+ .rise_time_ns = 98,
+ .fall_time_ns = 38,
+ },
}"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)"
@@ -55,13 +70,6 @@ chip soc/intel/cannonlake
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)"
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)"
- # Touchscreen Digitizer
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST_PLUS,
- .rise_time_ns = 98,
- .fall_time_ns = 38,
- }"
-
register "PchHdaDspEnable" = "1"
register "PchHdaAudioLinkSsp0" = "1"
register "PchHdaAudioLinkSsp1" = "1"
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
index d5d806c91e..6bd90a55ac 100644
--- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
+++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb
@@ -72,11 +72,20 @@ chip soc/intel/cannonlake
# Enable S0ix
register "s0ix_enable" = "1"
- # Audio
- register "i2c[3]" = "{
- .speed = I2C_SPEED_STANDARD,
- .rise_time_ns = 104,
- .fall_time_ns = 52,
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| chipset_lockdown | CHIPSET_LOCKDOWN_COREBOOT |
+ #| I2C3 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ .i2c[3] = {
+ .speed = I2C_SPEED_STANDARD,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ },
}"
device domain 0 on
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
index 70b28bb62c..d3d0b00c8e 100644
--- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb
@@ -80,11 +80,18 @@ chip soc/intel/apollolake
register "gpe0_dw2" = "PMC_GPE_N_95_64"
register "gpe0_dw3" = "PMC_GPE_NW_31_0"
- # Enable I2C0 for audio codec at 400kHz
- register "i2c[0]" = "{
- .speed = I2C_SPEED_FAST,
- .rise_time_ns = 104,
- .fall_time_ns = 52,
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| I2C0 | Audio |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ },
}"
# Minimum SLP S3 assertion width 28ms.
diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb
index 8751255076..1f5d1a7124 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb
@@ -214,7 +214,9 @@ chip soc/intel/skylake
register "VmxEnable" = "0"
# Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ }"
device cpu_cluster 0 on
device lapic 0 on end
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb
index f07d38199f..efcf9be3b8 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb
@@ -209,7 +209,9 @@ chip soc/intel/skylake
register "sdcard_cd_gpio_default" = "GPP_G5"
# Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ }"
device cpu_cluster 0 on
device lapic 0 on end
diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb
index 44aa325bff..ffa259b7f6 100644
--- a/src/mainboard/intel/kunimitsu/devicetree.cb
+++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -193,7 +193,9 @@ chip soc/intel/skylake
register "sdcard_cd_gpio_default" = "GPP_A7"
# Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ }"
device cpu_cluster 0 on
device lapic 0 on end
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
index 5f61d346a8..18dffcf2b5 100644
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
@@ -179,7 +179,9 @@ chip soc/intel/skylake
register "SendVrMbxCmd" = "2"
# Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ }"
device cpu_cluster 0 on
device lapic 0 on end
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
index 520736ced1..01445dcb8f 100644
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
@@ -186,7 +186,9 @@ chip soc/intel/skylake
register "SendVrMbxCmd" = "2"
# Lock Down
- register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
+ register "common_soc_config" = "{
+ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
+ }"
device cpu_cluster 0 on
device lapic 0 on end
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
index c1ef76b649..4d9c655434 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
@@ -43,9 +43,16 @@ chip soc/intel/apollolake
# [6:0] steps of delay for HS200, each 125ps.
register "emmc_rx_cmd_data_cntl2" = "0x10008"
- # Enable I2C0 for proximity sensor at 100kHz
- register "i2c[0]" = "{
- .speed = I2C_SPEED_STANDARD
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| I2C0 | Proximity Sensor |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .i2c[0] = {
+ .speed = I2C_SPEED_STANDARD
+ },
}"
device domain 0 on