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-rw-r--r--src/mainboard/google/veyron_jerry/Kconfig1
-rw-r--r--src/mainboard/google/veyron_jerry/boardid.c12
-rw-r--r--src/mainboard/google/veyron_jerry/sdram_configs.c25
-rw-r--r--src/mainboard/google/veyron_pinky/Kconfig1
-rw-r--r--src/mainboard/google/veyron_pinky/boardid.c12
-rw-r--r--src/mainboard/google/veyron_pinky/sdram_configs.c25
6 files changed, 30 insertions, 46 deletions
diff --git a/src/mainboard/google/veyron_jerry/Kconfig b/src/mainboard/google/veyron_jerry/Kconfig
index 14c9f5cb70..d76e044709 100644
--- a/src/mainboard/google/veyron_jerry/Kconfig
+++ b/src/mainboard/google/veyron_jerry/Kconfig
@@ -25,6 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_SPI
select EC_SOFTWARE_SYNC
+ select RAM_CODE_SUPPORT
select SOC_ROCKCHIP_RK3288
select MAINBOARD_DO_NATIVE_VGA_INIT
select MAINBOARD_HAS_CHROMEOS
diff --git a/src/mainboard/google/veyron_jerry/boardid.c b/src/mainboard/google/veyron_jerry/boardid.c
index 66de2768f2..513754f048 100644
--- a/src/mainboard/google/veyron_jerry/boardid.c
+++ b/src/mainboard/google/veyron_jerry/boardid.c
@@ -35,3 +35,15 @@ uint8_t board_id(void)
return id;
}
+
+uint32_t ram_code(void)
+{
+ uint32_t code;
+ static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
+ [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
+
+ code = gpio_base2_value(pins, ARRAY_SIZE(pins));
+ printk(BIOS_SPEW, "RAM Config: %u.\n", code);
+
+ return code;
+}
diff --git a/src/mainboard/google/veyron_jerry/sdram_configs.c b/src/mainboard/google/veyron_jerry/sdram_configs.c
index a58c6dd3d3..359375830c 100644
--- a/src/mainboard/google/veyron_jerry/sdram_configs.c
+++ b/src/mainboard/google/veyron_jerry/sdram_configs.c
@@ -17,6 +17,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
+#include <boardid.h>
#include <console/console.h>
#include <gpio.h>
#include <soc/sdram.h>
@@ -42,31 +43,9 @@ static struct rk3288_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */
};
-#define GPIO_RAMCODE0 GPIO(8, A, 0)
-#define GPIO_RAMCODE1 GPIO(8, A, 1)
-#define GPIO_RAMCODE2 GPIO(8, A, 2)
-#define GPIO_RAMCODE3 GPIO(8, A, 3)
-
-u32 sdram_get_ram_code(void)
-{
- u32 code = 0;
-
- gpio_input(GPIO_RAMCODE0);
- gpio_input(GPIO_RAMCODE1);
- gpio_input(GPIO_RAMCODE2);
- gpio_input(GPIO_RAMCODE3);
-
- code = gpio_get(GPIO_RAMCODE3) << 3
- | gpio_get(GPIO_RAMCODE2) << 2
- | gpio_get(GPIO_RAMCODE1) << 1
- | gpio_get(GPIO_RAMCODE0) << 0;
-
- return code;
-}
-
const struct rk3288_sdram_params *get_sdram_config()
{
- u32 ramcode = sdram_get_ram_code();
+ u32 ramcode = ram_code();
if (ramcode >= ARRAY_SIZE(sdram_configs)
|| sdram_configs[ramcode].dramtype == UNUSED)
diff --git a/src/mainboard/google/veyron_pinky/Kconfig b/src/mainboard/google/veyron_pinky/Kconfig
index 7c4f084a99..daef732f3c 100644
--- a/src/mainboard/google/veyron_pinky/Kconfig
+++ b/src/mainboard/google/veyron_pinky/Kconfig
@@ -25,6 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_SPI
select EC_SOFTWARE_SYNC
+ select RAM_CODE_SUPPORT
select SOC_ROCKCHIP_RK3288
select MAINBOARD_DO_NATIVE_VGA_INIT
select MAINBOARD_HAS_CHROMEOS
diff --git a/src/mainboard/google/veyron_pinky/boardid.c b/src/mainboard/google/veyron_pinky/boardid.c
index 66de2768f2..513754f048 100644
--- a/src/mainboard/google/veyron_pinky/boardid.c
+++ b/src/mainboard/google/veyron_pinky/boardid.c
@@ -35,3 +35,15 @@ uint8_t board_id(void)
return id;
}
+
+uint32_t ram_code(void)
+{
+ uint32_t code;
+ static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2),
+ [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */
+
+ code = gpio_base2_value(pins, ARRAY_SIZE(pins));
+ printk(BIOS_SPEW, "RAM Config: %u.\n", code);
+
+ return code;
+}
diff --git a/src/mainboard/google/veyron_pinky/sdram_configs.c b/src/mainboard/google/veyron_pinky/sdram_configs.c
index a58c6dd3d3..359375830c 100644
--- a/src/mainboard/google/veyron_pinky/sdram_configs.c
+++ b/src/mainboard/google/veyron_pinky/sdram_configs.c
@@ -17,6 +17,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
+#include <boardid.h>
#include <console/console.h>
#include <gpio.h>
#include <soc/sdram.h>
@@ -42,31 +43,9 @@ static struct rk3288_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */
};
-#define GPIO_RAMCODE0 GPIO(8, A, 0)
-#define GPIO_RAMCODE1 GPIO(8, A, 1)
-#define GPIO_RAMCODE2 GPIO(8, A, 2)
-#define GPIO_RAMCODE3 GPIO(8, A, 3)
-
-u32 sdram_get_ram_code(void)
-{
- u32 code = 0;
-
- gpio_input(GPIO_RAMCODE0);
- gpio_input(GPIO_RAMCODE1);
- gpio_input(GPIO_RAMCODE2);
- gpio_input(GPIO_RAMCODE3);
-
- code = gpio_get(GPIO_RAMCODE3) << 3
- | gpio_get(GPIO_RAMCODE2) << 2
- | gpio_get(GPIO_RAMCODE1) << 1
- | gpio_get(GPIO_RAMCODE0) << 0;
-
- return code;
-}
-
const struct rk3288_sdram_params *get_sdram_config()
{
- u32 ramcode = sdram_get_ram_code();
+ u32 ramcode = ram_code();
if (ramcode >= ARRAY_SIZE(sdram_configs)
|| sdram_configs[ramcode].dramtype == UNUSED)