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-rw-r--r--src/mainboard/totalimpact/briq/Config.lb16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/totalimpact/briq/Config.lb b/src/mainboard/totalimpact/briq/Config.lb
index 74a36eb3ab..1a1c66c5a0 100644
--- a/src/mainboard/totalimpact/briq/Config.lb
+++ b/src/mainboard/totalimpact/briq/Config.lb
@@ -15,12 +15,6 @@ default PCIC0_CFGADDR=0xff508000
default PCIC0_CFGDATA=0xff508010
##
-## Set IDE control registers
-##
-default PNP_CFGADDR=0x1f0
-default PNP_CFGDATA=0x1f1
-
-##
## Set UART base address
##
default TTYS0_BASE=0x3f8
@@ -28,8 +22,13 @@ default TTYS0_BASE=0x3f8
##
## Early board initialization, called from ppc_main()
##
-initobject init.c
-driver pci_bridge.c
+initobject init.o
+initobject clock.o
+
+##
+## Stage 2 timer support
+##
+object clock.o
arch ppc end
@@ -43,6 +42,7 @@ end
##
## Include the secondary Configuration files
##
+northbridge ibm/cpc710 end
southbridge winbond/w83c553 end
##