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-rw-r--r--src/mainboard/clevo/kbl-u/Makefile.inc3
-rw-r--r--src/mainboard/clevo/kbl-u/bootblock.c9
-rw-r--r--src/mainboard/clevo/kbl-u/include/variant/gpio.h1
-rw-r--r--src/mainboard/clevo/kbl-u/variants/n13xwu/gpio_early.c17
4 files changed, 30 insertions, 0 deletions
diff --git a/src/mainboard/clevo/kbl-u/Makefile.inc b/src/mainboard/clevo/kbl-u/Makefile.inc
index aeb584438b..b424d4da19 100644
--- a/src/mainboard/clevo/kbl-u/Makefile.inc
+++ b/src/mainboard/clevo/kbl-u/Makefile.inc
@@ -2,6 +2,9 @@
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
+bootblock-y += bootblock.c
+bootblock-y += variants/$(VARIANT_DIR)/gpio_early.c
+
ramstage-y += ramstage.c
ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
ramstage-y += variants/$(VARIANT_DIR)/gpio.c
diff --git a/src/mainboard/clevo/kbl-u/bootblock.c b/src/mainboard/clevo/kbl-u/bootblock.c
new file mode 100644
index 0000000000..b351fbd8ef
--- /dev/null
+++ b/src/mainboard/clevo/kbl-u/bootblock.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootblock_common.h>
+#include <variant/gpio.h>
+
+void bootblock_mainboard_early_init(void)
+{
+ variant_configure_early_gpios();
+}
diff --git a/src/mainboard/clevo/kbl-u/include/variant/gpio.h b/src/mainboard/clevo/kbl-u/include/variant/gpio.h
index 4258325cf9..95d576294f 100644
--- a/src/mainboard/clevo/kbl-u/include/variant/gpio.h
+++ b/src/mainboard/clevo/kbl-u/include/variant/gpio.h
@@ -3,6 +3,7 @@
#ifndef VARIANT_GPIO_H
#define VARIANT_GPIO_H
+void variant_configure_early_gpios(void);
void variant_configure_gpios(void);
#endif
diff --git a/src/mainboard/clevo/kbl-u/variants/n13xwu/gpio_early.c b/src/mainboard/clevo/kbl-u/variants/n13xwu/gpio_early.c
new file mode 100644
index 0000000000..dc55aae6d3
--- /dev/null
+++ b/src/mainboard/clevo/kbl-u/variants/n13xwu/gpio_early.c
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/gpio.h>
+#include <variant/gpio.h>
+
+static const struct pad_config early_gpio_table[] = {
+ // UART2_RXD
+ _PAD_CFG_STRUCT(GPP_C20, 0x44000702, 0x0),
+
+ // UART2_TXD
+ _PAD_CFG_STRUCT(GPP_C21, 0x44000700, 0x0)
+};
+
+void variant_configure_early_gpios(void)
+{
+ gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
+}