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-rw-r--r--src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-samsung-4GB.inc14
-rw-r--r--src/mainboard/google/veyron_danger/sdram_inf/sdram-ddr3-samsung-4GB.inc14
-rw-r--r--src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc14
-rw-r--r--src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc14
-rw-r--r--src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-samsung-4GB.inc14
-rw-r--r--src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-samsung-4GB.inc14
6 files changed, 42 insertions, 42 deletions
diff --git a/src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c456..a32f1a6129 100644
--- a/src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_brain/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_danger/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_danger/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c456..a32f1a6129 100644
--- a/src/mainboard/google/veyron_danger/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_danger/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c456..a32f1a6129 100644
--- a/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c456..a32f1a6129 100644
--- a/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_mighty/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c456..a32f1a6129 100644
--- a/src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_pinky/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,
diff --git a/src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-samsung-4GB.inc
index bd6201c456..a32f1a6129 100644
--- a/src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-samsung-4GB.inc
+++ b/src/mainboard/google/veyron_speedy/sdram_inf/sdram-ddr3-samsung-4GB.inc
@@ -2,24 +2,24 @@
/* 4 Samsung K4B8G1646Q chips */
{
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
},
{
- .rank = 0x1,
+ .rank = 0x2,
.col = 0xA,
.bk = 0x3,
.bw = 0x2,
.dbw = 0x1,
.row_3_4 = 0x0,
- .cs0_row = 0x10,
- .cs1_row = 0x10
+ .cs0_row = 0xF,
+ .cs1_row = 0xF
}
},
{
@@ -69,7 +69,7 @@
},
.noc_timing = 0x30B25564,
.noc_activate = 0x627,
- .ddrconfig = 4,
+ .ddrconfig = 3,
.ddr_freq = 666*MHz,
.dramtype = DDR3,
.num_channels = 2,