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-rw-r--r--src/mainboard/lenovo/t400/Makefile.inc1
-rw-r--r--src/mainboard/lenovo/t400/blc.c38
-rw-r--r--src/mainboard/lenovo/x200/Makefile.inc1
-rw-r--r--src/mainboard/lenovo/x200/blc.c43
-rw-r--r--src/mainboard/roda/rk9/Makefile.inc1
-rw-r--r--src/mainboard/roda/rk9/blc.c22
6 files changed, 106 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t400/Makefile.inc b/src/mainboard/lenovo/t400/Makefile.inc
index 3aa94b59d2..8ac61bbb77 100644
--- a/src/mainboard/lenovo/t400/Makefile.inc
+++ b/src/mainboard/lenovo/t400/Makefile.inc
@@ -18,3 +18,4 @@ romstage-y += dock.c
ramstage-y += dock.c
ramstage-y += cstates.c
romstage-y += hybrid_graphics.c
+ramstage-y += blc.c
diff --git a/src/mainboard/lenovo/t400/blc.c b/src/mainboard/lenovo/t400/blc.c
new file mode 100644
index 0000000000..01f34c1c46
--- /dev/null
+++ b/src/mainboard/lenovo/t400/blc.c
@@ -0,0 +1,38 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 arthur@aheymans.xyz
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <commonlib/helpers.h>
+#include <northbridge/intel/gm45/gm45.h>
+
+static const struct blc_pwm_t blc_entries[] = {
+ /* Vendor BIOS seems to intend to set PWM freq at 220Hz */
+ /* T400 */
+ {"B141EW04 V7 ", 110},
+ {"LP141WX3-TLR1", 110},
+ {"LP141WX5-TLP2", 450},
+ {"LTN141AT12401", 450},
+ {"LTN141W1-L05", 110},
+ {"LTN141WD-L05", 110},
+ /* T500 */
+ {"LP154W02-TL06", 110},
+ {"LTN154P3-L02", 110},
+};
+
+int get_blc_values(const struct blc_pwm_t **entries)
+{
+ *entries = blc_entries;
+ return ARRAY_SIZE(blc_entries);
+}
diff --git a/src/mainboard/lenovo/x200/Makefile.inc b/src/mainboard/lenovo/x200/Makefile.inc
index b382efbd9d..c16aa6a43c 100644
--- a/src/mainboard/lenovo/x200/Makefile.inc
+++ b/src/mainboard/lenovo/x200/Makefile.inc
@@ -15,3 +15,4 @@
ramstage-y += dock.c
ramstage-y += cstates.c
+ramstage-y += blc.c \ No newline at end of file
diff --git a/src/mainboard/lenovo/x200/blc.c b/src/mainboard/lenovo/x200/blc.c
new file mode 100644
index 0000000000..3d35460552
--- /dev/null
+++ b/src/mainboard/lenovo/x200/blc.c
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 arthur@aheymans.xyz
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <commonlib/helpers.h>
+#include <northbridge/intel/gm45/gm45.h>
+
+static const struct blc_pwm_t blc_entries[] = {
+ {"LTD121EWVB", 165},
+ {"B121EW03 V6 ", 165},
+ /* datasheets: between 100 and 20k, typical 200 */
+ /* TESTED: works best at 400 */
+ {"B121EW09 V3 ", 400},
+ {"HV121WX4-120", 110}, /* Aftermarket AFFS lcd, works well at low pwm */
+ {"LTN121AT03001", 110},
+ {"LTN121AP03001", 750},
+ /* TODO: untested panels found on thinkwiki */
+ /* Generally CCFL runs best at lower PWM */
+ /* {"B121EW09 V2 ", 450}, */
+ /* {"N121IB-L05", 450}, */
+ {"LP121WX3-TLC1", 400}, /* TESTED to work best at this value */
+ /* {"LP121WX3-TLA1" 450}, */
+ /* {"B121EW03 V3 " 110}, */
+ /* {"LTN121AP02001" 110}, */
+};
+
+int get_blc_values(const struct blc_pwm_t **entries)
+{
+ *entries = blc_entries;
+ return ARRAY_SIZE(blc_entries);
+}
diff --git a/src/mainboard/roda/rk9/Makefile.inc b/src/mainboard/roda/rk9/Makefile.inc
index 5a16ed8de9..f92382ee43 100644
--- a/src/mainboard/roda/rk9/Makefile.inc
+++ b/src/mainboard/roda/rk9/Makefile.inc
@@ -15,3 +15,4 @@
ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += ti_pci7xx1.c
ramstage-y += cstates.c
+ramstage-y += blc.c
diff --git a/src/mainboard/roda/rk9/blc.c b/src/mainboard/roda/rk9/blc.c
new file mode 100644
index 0000000000..4b6104ec05
--- /dev/null
+++ b/src/mainboard/roda/rk9/blc.c
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 arthur@aheymans.xyz
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <northbridge/intel/gm45/gm45.h>
+
+int get_blc_values(const struct blc_pwm_t **entries)
+{
+ return 0;
+}