diff options
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/lenovo/t400/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t400/bootblock.c | 37 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t400/romstage.c | 18 | ||||
| -rw-r--r-- | src/mainboard/roda/rk9/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/mainboard/roda/rk9/bootblock.c | 63 | ||||
| -rw-r--r-- | src/mainboard/roda/rk9/romstage.c | 46 |
6 files changed, 104 insertions, 65 deletions
diff --git a/src/mainboard/lenovo/t400/Makefile.inc b/src/mainboard/lenovo/t400/Makefile.inc index d0ee1537f4..b3ca78d2de 100644 --- a/src/mainboard/lenovo/t400/Makefile.inc +++ b/src/mainboard/lenovo/t400/Makefile.inc @@ -13,7 +13,8 @@ ## GNU General Public License for more details. ## -romstage-y += dock.c +bootblock-y += bootblock.c +bootblock-y += dock.c subdirs-y += variants/$(VARIANT_DIR)/ diff --git a/src/mainboard/lenovo/t400/bootblock.c b/src/mainboard/lenovo/t400/bootblock.c new file mode 100644 index 0000000000..c9f3cf6b5b --- /dev/null +++ b/src/mainboard/lenovo/t400/bootblock.c @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <bootblock_common.h> +#include "dock.h" + +static int dock_err; + +void bootblock_mainboard_early_init(void) +{ + /* Minimal setup to detect dock */ + dock_err = pc87382_early(); + if (dock_err == 0) + dock_connect(); +} + +void bootblock_mainboard_init(void) +{ + /* Console is not yet initialized in bootblock_mainboard_early_init, + so we print the dock information here */ + if (dock_err) + printk(BIOS_ERR, "DOCK: Failed to init pc87382\n"); + else + dock_info(); +} diff --git a/src/mainboard/lenovo/t400/romstage.c b/src/mainboard/lenovo/t400/romstage.c index e8215654e1..4b0a4c7352 100644 --- a/src/mainboard/lenovo/t400/romstage.c +++ b/src/mainboard/lenovo/t400/romstage.c @@ -18,7 +18,6 @@ #include <southbridge/intel/common/gpio.h> #include <northbridge/intel/gm45/gm45.h> #include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h> -#include "dock.h" static void hybrid_graphics_init(sysinfo_t *sysinfo) { @@ -30,16 +29,6 @@ static void hybrid_graphics_init(sysinfo_t *sysinfo) sysinfo->enable_peg = peg; } -static int dock_err; - -void mb_setup_superio(void) -{ - /* Minimal setup to detect dock */ - dock_err = pc87382_early(); - if (dock_err == 0) - dock_connect(); -} - void get_mb_spd_addrmap(u8 *spd_addrmap) { spd_addrmap[0] = 0x50; @@ -48,13 +37,6 @@ void get_mb_spd_addrmap(u8 *spd_addrmap) void mb_pre_raminit_setup(sysinfo_t *sysinfo) { - /* Console is not yet initialized in mb_setup_superio, so we print - the dock information here */ - if (dock_err) - printk(BIOS_ERR, "DOCK: Failed to init pc87382\n"); - else - dock_info(); - if (CONFIG(BOARD_LENOVO_R500)) { int use_integrated = get_gpio(21); printk(BIOS_DEBUG, "R500 variant found with an %s GPU\n", diff --git a/src/mainboard/roda/rk9/Makefile.inc b/src/mainboard/roda/rk9/Makefile.inc index 7ff15887ca..1140e11d0f 100644 --- a/src/mainboard/roda/rk9/Makefile.inc +++ b/src/mainboard/roda/rk9/Makefile.inc @@ -13,6 +13,8 @@ ## GNU General Public License for more details. ## +bootblock-y += bootblock.c + romstage-y = gpio.c ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += ti_pci7xx1.c diff --git a/src/mainboard/roda/rk9/bootblock.c b/src/mainboard/roda/rk9/bootblock.c new file mode 100644 index 0000000000..454c3a0418 --- /dev/null +++ b/src/mainboard/roda/rk9/bootblock.c @@ -0,0 +1,63 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 secunet Security Networks AG + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <arch/io.h> +#include <device/pnp_ops.h> +#include <superio/smsc/lpc47n227/lpc47n227.h> + +#define SERIAL_DEV PNP_DEV(0x2e, LPC47N227_SP1) + +void bootblock_mainboard_early_init(void) +{ + /* Original settings: + idx 30 31 32 33 34 35 36 37 38 39 + val 60 00 00 40 00 ff 00 e0 00 80 + def 00 00 00 00 00 00 00 00 00 80 + + Values: + GP1 GP2 GP3 GP4 + fd 17 88 14 + */ + const pnp_devfn_t sio = PNP_DEV(0x2e, 0); + + /* Enter super-io's configuration state. */ + pnp_enter_conf_state(sio); + + /* Set lpc47n227's runtime register block's base address. */ + pnp_write_config(sio, 0x30, 0x600 >> 4); + + /* Set GP23 to alternate function. */ + pnp_write_config(sio, 0x33, 0x40); + + /* Set GP30 - GP37 to output mode: COM control */ + pnp_write_config(sio, 0x35, 0xff); + + /* Set GP45 - GP47 to output mode. */ + pnp_write_config(sio, 0x37, 0xe0); + + /* Set nIO_PME to open drain. */ + pnp_write_config(sio, 0x39, 0x80); + + /* Exit configuration state. */ + pnp_exit_conf_state(sio); + + /* Set GPIO output values: */ + outb(0x88, 0x600 + 0xb + 3); /* GP30 - GP37 */ + outb(0x10, 0x600 + 0xb + 4); /* GP40 - GP47 */ + + lpc47n227_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} diff --git a/src/mainboard/roda/rk9/romstage.c b/src/mainboard/roda/rk9/romstage.c index b37b5c5f63..48ca6b6b7d 100644 --- a/src/mainboard/roda/rk9/romstage.c +++ b/src/mainboard/roda/rk9/romstage.c @@ -14,53 +14,7 @@ * GNU General Public License for more details. */ -#include <arch/io.h> -#include <device/pnp_ops.h> #include <northbridge/intel/gm45/gm45.h> -#include <superio/smsc/lpc47n227/lpc47n227.h> - -#define SERIAL_DEV PNP_DEV(0x2e, LPC47N227_SP1) - -void mb_setup_superio(void) -{ - /* Original settings: - idx 30 31 32 33 34 35 36 37 38 39 - val 60 00 00 40 00 ff 00 e0 00 80 - def 00 00 00 00 00 00 00 00 00 80 - - Values: - GP1 GP2 GP3 GP4 - fd 17 88 14 - */ - const pnp_devfn_t sio = PNP_DEV(0x2e, 0); - - /* Enter super-io's configuration state. */ - pnp_enter_conf_state(sio); - - /* Set lpc47n227's runtime register block's base address. */ - pnp_write_config(sio, 0x30, 0x600 >> 4); - - /* Set GP23 to alternate function. */ - pnp_write_config(sio, 0x33, 0x40); - - /* Set GP30 - GP37 to output mode: COM control */ - pnp_write_config(sio, 0x35, 0xff); - - /* Set GP45 - GP47 to output mode. */ - pnp_write_config(sio, 0x37, 0xe0); - - /* Set nIO_PME to open drain. */ - pnp_write_config(sio, 0x39, 0x80); - - /* Exit configuration state. */ - pnp_exit_conf_state(sio); - - /* Set GPIO output values: */ - outb(0x88, 0x600 + 0xb + 3); /* GP30 - GP37 */ - outb(0x10, 0x600 + 0xb + 4); /* GP40 - GP47 */ - - lpc47n227_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} void get_mb_spd_addrmap(u8 *spd_addrmap) { |