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-rw-r--r--src/mainboard/bcom/winnetp680/romstage.c9
-rw-r--r--src/mainboard/digitallogic/msm800sev/romstage.c2
-rw-r--r--src/mainboard/hp/dl145_g3/mptable.c8
-rw-r--r--src/mainboard/kontron/kt690/mainboard.c6
-rw-r--r--src/mainboard/pcengines/alix1c/romstage.c2
-rw-r--r--src/mainboard/technexion/tim8690/mainboard.c4
6 files changed, 9 insertions, 22 deletions
diff --git a/src/mainboard/bcom/winnetp680/romstage.c b/src/mainboard/bcom/winnetp680/romstage.c
index 4bd7a45844..05f436e65e 100644
--- a/src/mainboard/bcom/winnetp680/romstage.c
+++ b/src/mainboard/bcom/winnetp680/romstage.c
@@ -39,10 +39,6 @@
#include "superio/winbond/w83697hf/w83697hf_early_serial.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1)
-static void memreset_setup(void)
-{
-}
-
static inline int spd_read_byte(unsigned device, unsigned address)
{
return smbus_read_byte(device, address);
@@ -53,8 +49,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
static void enable_mainboard_devices(void)
{
device_t dev;
- u8 reg;
-
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
if (dev == PCI_DEV_INVALID)
die("Southbridge not found!!!\n");
@@ -89,9 +83,6 @@ static const struct mem_controller ctrl = {
void main(unsigned long bist)
{
- unsigned long x;
- device_t dev;
-
/* Enable multifunction for northbridge. */
pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c
index 1e4ee4c7eb..be696d97d4 100644
--- a/src/mainboard/digitallogic/msm800sev/romstage.c
+++ b/src/mainboard/digitallogic/msm800sev/romstage.c
@@ -51,7 +51,6 @@ static void msr_init(void)
msr.hi = 0x20000000;
msr.lo = 0xfff00;
wrmsr(MSR_GLIU1 + 0x20, msr);
-
}
static void mb_gpio_init(void)
@@ -61,7 +60,6 @@ static void mb_gpio_init(void)
void cache_as_ram_main(void)
{
- extern void RestartCAR();
post_code(0x01);
static const struct mem_controller memctrl [] = {
diff --git a/src/mainboard/hp/dl145_g3/mptable.c b/src/mainboard/hp/dl145_g3/mptable.c
index 9f52466b6a..6aa3f0e404 100644
--- a/src/mainboard/hp/dl145_g3/mptable.c
+++ b/src/mainboard/hp/dl145_g3/mptable.c
@@ -50,8 +50,6 @@ static void *smp_write_config_table(void *v)
static const char productid[12] = "TREX ";
struct mp_config_table *mc;
- unsigned char bus_num;
- int i;
struct mb_sysconf_t *m;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@@ -78,11 +76,13 @@ static void *smp_write_config_table(void *v)
/*Bus: Bus ID Type*/
/* define bus and isa numbers */
-/* for(bus_num = 0; bus_num < m->bus_isa; bus_num++) {
+#if 0
+ unsigned char bus_num;
+ for(bus_num = 0; bus_num < m->bus_isa; bus_num++) {
smp_write_bus(mc, bus_num, "PCI ");
printk(BIOS_DEBUG, "writing bus %d as PCI...\n",bus_num);
}
- */
+#endif
smp_write_bus(mc, 0, "PCI ");
smp_write_bus(mc, 1, "PCI ");
smp_write_bus(mc, 7, "PCI ");
diff --git a/src/mainboard/kontron/kt690/mainboard.c b/src/mainboard/kontron/kt690/mainboard.c
index 5de74a6cff..8f428e918f 100644
--- a/src/mainboard/kontron/kt690/mainboard.c
+++ b/src/mainboard/kontron/kt690/mainboard.c
@@ -57,7 +57,7 @@ uint64_t uma_memory_base, uma_memory_size;
* RRG4.2.3.1 GPM pins as Input
* RRG4.2.3.2 GPM pins as Output
********************************************************/
-static void enable_onboard_nic()
+static void enable_onboard_nic(void)
{
u8 byte;
@@ -94,7 +94,7 @@ static void enable_onboard_nic()
* IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to
* get the cable type, 40 pin or 80 pin?
********************************************************/
-static void get_ide_dma66()
+static void get_ide_dma66(void)
{
u8 byte;
struct device *sm_dev;
@@ -120,7 +120,7 @@ static void get_ide_dma66()
/*
* set thermal config
*/
-static void set_thermal_config()
+static void set_thermal_config(void)
{
u8 byte;
u16 word;
diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c
index 1ba4440324..c4a9cc98e5 100644
--- a/src/mainboard/pcengines/alix1c/romstage.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -145,8 +145,6 @@ void cache_as_ram_main(void)
{.channel0 = {0x50}},
};
- extern void RestartCAR();
-
post_code(0x01);
SystemPreInit();
diff --git a/src/mainboard/technexion/tim8690/mainboard.c b/src/mainboard/technexion/tim8690/mainboard.c
index 977196beb5..11deef2ad4 100644
--- a/src/mainboard/technexion/tim8690/mainboard.c
+++ b/src/mainboard/technexion/tim8690/mainboard.c
@@ -54,7 +54,7 @@ uint64_t uma_memory_base, uma_memory_size;
* Both of their pin PERSTn pins are connected to GPIO 5 of the
* SB600 southbridge.
****************************************************/
-static void enable_onboard_nic()
+static void enable_onboard_nic(void)
{
u8 byte;
@@ -80,7 +80,7 @@ static void enable_onboard_nic()
/* set thermal config
*/
-static void set_thermal_config()
+static void set_thermal_config(void)
{
u8 byte;
u16 word;