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-rw-r--r--src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
index 1681b714d2..c5a3fc30bc 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
@@ -154,6 +154,20 @@ chip soc/intel/jasperlake
},
}"
+ # Set the minimum assertion width
+ register "PchPmSlpS3MinAssert" = "3" # 50ms
+ register "PchPmSlpS4MinAssert" = "1" # 1s
+ register "PchPmSlpSusMinAssert" = "3" # 1s
+ register "PchPmSlpAMinAssert" = "3" # 98ms
+
+ # NOTE: Duration programmed in the below register should never be smaller than the
+ # stretch duration programmed in the following registers -
+ # - GEN_PMCON_A.SLP_S3_MIN_ASST_WDTH (PchPmSlpS3MinAssert)
+ # - GEN_PMCON_A.S4MAW (PchPmSlpS4MinAssert)
+ # - PM_CFG.SLP_A_MIN_ASST_WDTH (PchPmSlpAMinAssert)
+ # - PM_CFG.SLP_LAN_MIN_ASST_WDTH
+ register "PchPmPwrCycDur" = "1" # 1s
+
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device