diff options
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/octopus/variants/baseboard/devicetree.cb | 7 | ||||
| -rw-r--r-- | src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl | 9 |
2 files changed, 11 insertions, 5 deletions
diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index 6f71f169d4..9cab69c167 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -42,10 +42,11 @@ chip soc/intel/apollolake register "gpe0_dw2" = "PMC_GPE_N_95_64" register "gpe0_dw3" = "PMC_GPE_N_63_32" - # PL1 override 12000 mW: Due to error in the energy calculation for + # PL1 override 8000 mW: Due to error in the energy calculation for # current VR solution. Experiments show that SoC TDP max (6W) can - # be reached when RAPL PL1 is set to 12W. - register "tdp_pl1_override_mw" = "12000" + # be reached when RAPL PL1 is set to 8W. + # TODO: Need to tune this value on closed chassis system. + register "tdp_pl1_override_mw" = "8000" # Set RAPL PL2 to 15W. register "tdp_pl2_override_mw" = "15000" diff --git a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl index 2fafa5283f..fb5b590255 100644 --- a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl +++ b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/acpi/dptf.asl @@ -15,7 +15,11 @@ /* Below values might change after Thermal Tuning. */ #define DPTF_CPU_PASSIVE 90 -#define DPTF_CPU_CRITICAL 99 +/* During stress testing with busty workloads, sometime CPU temperature +spikes till 99C and DPTF initiates shutdown. With reference to previous +APL/reef/Coral platforms, we had used 105C for this CPU critical +temperature trip value to avoid abrupt thermal shutdown. */ +#define DPTF_CPU_CRITICAL 105 #define DPTF_TSR0_SENSOR_ID 0 #define DPTF_TSR0_SENSOR_NAME "Battery" @@ -65,7 +69,8 @@ Name (MPPC, Package () Package () { /* Power Limit 1 */ 0, /* PowerLimitIndex, 0 for Power Limit 1 */ 3000, /* PowerLimitMinimum */ - 12000, /* PowerLimitMaximum */ + /* TODO: Need to tune this value on closed chassis system. */ + 8000, /* PowerLimitMaximum */ 1000, /* TimeWindowMinimum */ 1000, /* TimeWindowMaximum */ 200 /* StepSize */ |