diff options
Diffstat (limited to 'src/mainboard')
146 files changed, 0 insertions, 157 deletions
diff --git a/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb b/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb index 221b80ce68..f1f36938c7 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb +++ b/src/mainboard/aaeon/pfm-540i_revb/devicetree.cb @@ -71,4 +71,3 @@ chip northbridge/amd/lx end end end - diff --git a/src/mainboard/amd/db800/devicetree.cb b/src/mainboard/amd/db800/devicetree.cb index 3331a12ee5..781beb59d8 100644 --- a/src/mainboard/amd/db800/devicetree.cb +++ b/src/mainboard/amd/db800/devicetree.cb @@ -65,4 +65,3 @@ chip northbridge/amd/lx end end end - diff --git a/src/mainboard/amd/dbm690t/devicetree.cb b/src/mainboard/amd/dbm690t/devicetree.cb index 8dd971eef2..898537b155 100644 --- a/src/mainboard/amd/dbm690t/devicetree.cb +++ b/src/mainboard/amd/dbm690t/devicetree.cb @@ -119,4 +119,3 @@ chip northbridge/amd/amdk8/root_complex end #northbridge/amd/amdk8 end #domain end #northbridge/amd/amdk8/root_complex - diff --git a/src/mainboard/amd/dinar/buildOpts.c b/src/mainboard/amd/dinar/buildOpts.c index 1f4e891ebc..c55a8a0290 100644 --- a/src/mainboard/amd/dinar/buildOpts.c +++ b/src/mainboard/amd/dinar/buildOpts.c @@ -476,4 +476,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/dinar/devicetree.cb b/src/mainboard/amd/dinar/devicetree.cb index 9cc4cf78c4..f895d013e5 100644 --- a/src/mainboard/amd/dinar/devicetree.cb +++ b/src/mainboard/amd/dinar/devicetree.cb @@ -106,4 +106,3 @@ chip northbridge/amd/agesa/family15/root_complex end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family15/root_complex - diff --git a/src/mainboard/amd/inagua/Kconfig b/src/mainboard/amd/inagua/Kconfig index c79a0b33f8..d2bf5d0f84 100644 --- a/src/mainboard/amd/inagua/Kconfig +++ b/src/mainboard/amd/inagua/Kconfig @@ -80,4 +80,3 @@ config SB800_AHCI_ROM default n endif # BOARD_AMD_INAGUA - diff --git a/src/mainboard/amd/inagua/buildOpts.c b/src/mainboard/amd/inagua/buildOpts.c index 95ee913cc9..9dfc3c7f62 100644 --- a/src/mainboard/amd/inagua/buildOpts.c +++ b/src/mainboard/amd/inagua/buildOpts.c @@ -392,4 +392,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/inagua/devicetree.cb b/src/mainboard/amd/inagua/devicetree.cb index 57eabd966f..619d004ea1 100644 --- a/src/mainboard/amd/inagua/devicetree.cb +++ b/src/mainboard/amd/inagua/devicetree.cb @@ -94,4 +94,3 @@ chip northbridge/amd/agesa/family14/root_complex end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family14/root_complex - diff --git a/src/mainboard/amd/lamar/acpi/si.asl b/src/mainboard/amd/lamar/acpi/si.asl index 9520d581fd..de94071dfd 100644 --- a/src/mainboard/amd/lamar/acpi/si.asl +++ b/src/mainboard/amd/lamar/acpi/si.asl @@ -24,5 +24,3 @@ /* DBGO("\n") */ } } /* End Scope SI */ - - diff --git a/src/mainboard/amd/norwich/devicetree.cb b/src/mainboard/amd/norwich/devicetree.cb index 93effaa717..9a0121d8c1 100644 --- a/src/mainboard/amd/norwich/devicetree.cb +++ b/src/mainboard/amd/norwich/devicetree.cb @@ -38,4 +38,3 @@ chip northbridge/amd/lx end end end - diff --git a/src/mainboard/amd/olivehill/buildOpts.c b/src/mainboard/amd/olivehill/buildOpts.c index 4fe1b4813a..fefac7e7ed 100644 --- a/src/mainboard/amd/olivehill/buildOpts.c +++ b/src/mainboard/amd/olivehill/buildOpts.c @@ -454,4 +454,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl b/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl index b776d68cd1..3d90ba7ddf 100644 --- a/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl +++ b/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl @@ -38,4 +38,3 @@ Name(UOM6, 6) Name(UOM7, 2) Name(UOM8, 6) Name(UOM9, 6) - diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c index 2e654a77da..09629dd0b8 100644 --- a/src/mainboard/amd/parmer/buildOpts.c +++ b/src/mainboard/amd/parmer/buildOpts.c @@ -447,4 +447,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/persimmon/buildOpts.c b/src/mainboard/amd/persimmon/buildOpts.c index 93cfa8d7f2..244ab31243 100644 --- a/src/mainboard/amd/persimmon/buildOpts.c +++ b/src/mainboard/amd/persimmon/buildOpts.c @@ -392,4 +392,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/pistachio/acpi_tables.c b/src/mainboard/amd/pistachio/acpi_tables.c index 0ef181d3e5..628abfd192 100644 --- a/src/mainboard/amd/pistachio/acpi_tables.c +++ b/src/mainboard/amd/pistachio/acpi_tables.c @@ -56,4 +56,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - diff --git a/src/mainboard/amd/pistachio/devicetree.cb b/src/mainboard/amd/pistachio/devicetree.cb index 760e5abb00..805df7cb41 100644 --- a/src/mainboard/amd/pistachio/devicetree.cb +++ b/src/mainboard/amd/pistachio/devicetree.cb @@ -78,4 +78,3 @@ chip northbridge/amd/amdk8/root_complex end #northbridge/amd/amdk8 end #domain end #northbridge/amd/amdk8/root_complex - diff --git a/src/mainboard/amd/rumba/devicetree.cb b/src/mainboard/amd/rumba/devicetree.cb index a7a352f8f7..62fb28735e 100644 --- a/src/mainboard/amd/rumba/devicetree.cb +++ b/src/mainboard/amd/rumba/devicetree.cb @@ -18,4 +18,3 @@ chip northbridge/amd/gx2 end end end - diff --git a/src/mainboard/amd/serengeti_cheetah/devicetree.cb b/src/mainboard/amd/serengeti_cheetah/devicetree.cb index 28b7e01ac6..8ff0e3effe 100644 --- a/src/mainboard/amd/serengeti_cheetah/devicetree.cb +++ b/src/mainboard/amd/serengeti_cheetah/devicetree.cb @@ -145,5 +145,3 @@ chip northbridge/amd/amdk8/root_complex end #domain end - - diff --git a/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt b/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt index 5d2755425e..b999dfacbf 100644 --- a/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt +++ b/src/mainboard/amd/serengeti_cheetah/readme_acpi.txt @@ -27,4 +27,3 @@ use c to delele hex file yhlu 09/18/2005 - diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb b/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb index 8b5d817708..54c34f8bec 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb +++ b/src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb @@ -135,5 +135,3 @@ chip northbridge/amd/amdfam10/root_complex # end #domain end - - diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h b/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h index b152b047fb..fc2dcafd30 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h +++ b/src/mainboard/amd/serengeti_cheetah_fam10/mainboard.h @@ -1,2 +1 @@ unsigned long mainboard_write_acpi_tables(device_t device, unsigned long start, acpi_rsdp_t *rsdp); - diff --git a/src/mainboard/amd/south_station/Kconfig b/src/mainboard/amd/south_station/Kconfig index 53386c57a8..1d3348d427 100644 --- a/src/mainboard/amd/south_station/Kconfig +++ b/src/mainboard/amd/south_station/Kconfig @@ -73,4 +73,3 @@ config VGA_BIOS_ID default "1002,9806" endif # BOARD_AMD_SOUTHSTATION - diff --git a/src/mainboard/amd/south_station/buildOpts.c b/src/mainboard/amd/south_station/buildOpts.c index 716030cad0..d2882a750f 100644 --- a/src/mainboard/amd/south_station/buildOpts.c +++ b/src/mainboard/amd/south_station/buildOpts.c @@ -392,4 +392,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/south_station/devicetree.cb b/src/mainboard/amd/south_station/devicetree.cb index 0a3532fb55..76bedfb44f 100644 --- a/src/mainboard/amd/south_station/devicetree.cb +++ b/src/mainboard/amd/south_station/devicetree.cb @@ -109,4 +109,3 @@ chip northbridge/amd/agesa/family14/root_complex end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family14/root_complex - diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c index 4499840ff9..af22e65fee 100644 --- a/src/mainboard/amd/thatcher/buildOpts.c +++ b/src/mainboard/amd/thatcher/buildOpts.c @@ -447,4 +447,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/torpedo/buildOpts.c b/src/mainboard/amd/torpedo/buildOpts.c index 08fcb4d088..09067861ac 100644 --- a/src/mainboard/amd/torpedo/buildOpts.c +++ b/src/mainboard/amd/torpedo/buildOpts.c @@ -318,4 +318,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/torpedo/devicetree.cb b/src/mainboard/amd/torpedo/devicetree.cb index 8fe9e53f3c..c46d1800aa 100644 --- a/src/mainboard/amd/torpedo/devicetree.cb +++ b/src/mainboard/amd/torpedo/devicetree.cb @@ -87,4 +87,3 @@ chip northbridge/amd/agesa/family12/root_complex end #chip northbridge/amd/agesa/family12 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family12/root_complex - diff --git a/src/mainboard/amd/union_station/Kconfig b/src/mainboard/amd/union_station/Kconfig index ea69fc46a0..4a4a632254 100644 --- a/src/mainboard/amd/union_station/Kconfig +++ b/src/mainboard/amd/union_station/Kconfig @@ -72,4 +72,3 @@ config VGA_BIOS_ID default "1002,9802" endif # BOARD_AMD_UNIONSTATION - diff --git a/src/mainboard/amd/union_station/buildOpts.c b/src/mainboard/amd/union_station/buildOpts.c index 716030cad0..d2882a750f 100644 --- a/src/mainboard/amd/union_station/buildOpts.c +++ b/src/mainboard/amd/union_station/buildOpts.c @@ -392,4 +392,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/amd/union_station/devicetree.cb b/src/mainboard/amd/union_station/devicetree.cb index 0124b17c65..bf98359db5 100644 --- a/src/mainboard/amd/union_station/devicetree.cb +++ b/src/mainboard/amd/union_station/devicetree.cb @@ -85,4 +85,3 @@ chip northbridge/amd/agesa/family14/root_complex end #chip northbridge/amd/agesa/family14 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family14/root_complex - diff --git a/src/mainboard/apple/macbook21/cmos.layout b/src/mainboard/apple/macbook21/cmos.layout index 5bb8a37851..1dd42c1543 100644 --- a/src/mainboard/apple/macbook21/cmos.layout +++ b/src/mainboard/apple/macbook21/cmos.layout @@ -134,5 +134,3 @@ enumerations checksums checksum 392 983 984 - - diff --git a/src/mainboard/apple/macbook21/mainboard.c b/src/mainboard/apple/macbook21/mainboard.c index ef914ec5ca..3829b1da41 100644 --- a/src/mainboard/apple/macbook21/mainboard.c +++ b/src/mainboard/apple/macbook21/mainboard.c @@ -94,4 +94,3 @@ struct chip_operations mainboard_ops = { .enable_dev = mainboard_enable, .final = mainboard_final, }; - diff --git a/src/mainboard/arima/hdama/devicetree.cb b/src/mainboard/arima/hdama/devicetree.cb index 2035117101..5bb966d212 100644 --- a/src/mainboard/arima/hdama/devicetree.cb +++ b/src/mainboard/arima/hdama/devicetree.cb @@ -183,4 +183,3 @@ chip northbridge/amd/amdk8/root_complex end # chip northbridge/amd/amdk8 end end - diff --git a/src/mainboard/artecgroup/dbe61/devicetree.cb b/src/mainboard/artecgroup/dbe61/devicetree.cb index d270f3d793..2532885f28 100644 --- a/src/mainboard/artecgroup/dbe61/devicetree.cb +++ b/src/mainboard/artecgroup/dbe61/devicetree.cb @@ -39,4 +39,3 @@ chip northbridge/amd/lx end end - diff --git a/src/mainboard/asrock/939a785gmh/devicetree.cb b/src/mainboard/asrock/939a785gmh/devicetree.cb index f246dcfb31..8b40b9f6d4 100644 --- a/src/mainboard/asrock/939a785gmh/devicetree.cb +++ b/src/mainboard/asrock/939a785gmh/devicetree.cb @@ -129,4 +129,3 @@ chip northbridge/amd/amdk8/root_complex end #northbridge/amd/amdk8 end #domain end #northbridge/amd/amdk8/root_complex - diff --git a/src/mainboard/asrock/e350m1/Kconfig b/src/mainboard/asrock/e350m1/Kconfig index feba7ed59d..ff3e8f4bd5 100644 --- a/src/mainboard/asrock/e350m1/Kconfig +++ b/src/mainboard/asrock/e350m1/Kconfig @@ -66,4 +66,3 @@ config VGA_BIOS_ID default "1002,9802" endif # BOARD_ASROCK_E350M1 - diff --git a/src/mainboard/asrock/e350m1/buildOpts.c b/src/mainboard/asrock/e350m1/buildOpts.c index f8463c4988..2c6eb3b44d 100644 --- a/src/mainboard/asrock/e350m1/buildOpts.c +++ b/src/mainboard/asrock/e350m1/buildOpts.c @@ -392,4 +392,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/asrock/imb-a180/buildOpts.c b/src/mainboard/asrock/imb-a180/buildOpts.c index 1f0b94d781..219b524a57 100644 --- a/src/mainboard/asrock/imb-a180/buildOpts.c +++ b/src/mainboard/asrock/imb-a180/buildOpts.c @@ -454,4 +454,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/asus/f2a85-m/buildOpts.c b/src/mainboard/asus/f2a85-m/buildOpts.c index 7d81353d9e..b812cd5163 100644 --- a/src/mainboard/asus/f2a85-m/buildOpts.c +++ b/src/mainboard/asus/f2a85-m/buildOpts.c @@ -446,4 +446,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ PSO_END }; - diff --git a/src/mainboard/asus/f2a85-m_le/buildOpts.c b/src/mainboard/asus/f2a85-m_le/buildOpts.c index 1baa01f4c5..145fb67dcb 100644 --- a/src/mainboard/asus/f2a85-m_le/buildOpts.c +++ b/src/mainboard/asus/f2a85-m_le/buildOpts.c @@ -447,4 +447,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ PSO_END }; - diff --git a/src/mainboard/asus/mew-vm/devicetree.cb b/src/mainboard/asus/mew-vm/devicetree.cb index e0cc9e39eb..397b9993d0 100644 --- a/src/mainboard/asus/mew-vm/devicetree.cb +++ b/src/mainboard/asus/mew-vm/devicetree.cb @@ -49,4 +49,3 @@ chip northbridge/intel/i82810 chip cpu/intel/socket_PGA370 end end - diff --git a/src/mainboard/bap/ode_e20XX/buildOpts.c b/src/mainboard/bap/ode_e20XX/buildOpts.c index ab9a18a6b2..c7bdab8ce0 100644 --- a/src/mainboard/bap/ode_e20XX/buildOpts.c +++ b/src/mainboard/bap/ode_e20XX/buildOpts.c @@ -463,4 +463,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/biostar/am1ml/acpi/sata.asl b/src/mainboard/biostar/am1ml/acpi/sata.asl index 6f4d6d47b1..30733c8cfb 100644 --- a/src/mainboard/biostar/am1ml/acpi/sata.asl +++ b/src/mainboard/biostar/am1ml/acpi/sata.asl @@ -146,4 +146,3 @@ Scope(\_GPE) { } } } - diff --git a/src/mainboard/biostar/am1ml/buildOpts.c b/src/mainboard/biostar/am1ml/buildOpts.c index 422a8caef2..822eeb2ea2 100644 --- a/src/mainboard/biostar/am1ml/buildOpts.c +++ b/src/mainboard/biostar/am1ml/buildOpts.c @@ -454,4 +454,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/broadcom/blast/devicetree.cb b/src/mainboard/broadcom/blast/devicetree.cb index 9de4331f36..3e02a19a8f 100644 --- a/src/mainboard/broadcom/blast/devicetree.cb +++ b/src/mainboard/broadcom/blast/devicetree.cb @@ -120,4 +120,3 @@ chip northbridge/amd/amdk8/root_complex end #domain end - diff --git a/src/mainboard/cubietech/cubieboard/board_info.txt b/src/mainboard/cubietech/cubieboard/board_info.txt index 14a3755793..c67b641a94 100644 --- a/src/mainboard/cubietech/cubieboard/board_info.txt +++ b/src/mainboard/cubietech/cubieboard/board_info.txt @@ -1,2 +1 @@ Category: sbc - diff --git a/src/mainboard/cubietech/cubieboard/memlayout.ld b/src/mainboard/cubietech/cubieboard/memlayout.ld index 9032ce7d61..6fc798a3ac 100644 --- a/src/mainboard/cubietech/cubieboard/memlayout.ld +++ b/src/mainboard/cubietech/cubieboard/memlayout.ld @@ -33,4 +33,3 @@ SECTIONS RAMSTAGE(0x40000000, 16M) ROMSTAGE(0x41000000, 108K) } - diff --git a/src/mainboard/digitallogic/msm800sev/devicetree.cb b/src/mainboard/digitallogic/msm800sev/devicetree.cb index 839b767931..db511e50ab 100644 --- a/src/mainboard/digitallogic/msm800sev/devicetree.cb +++ b/src/mainboard/digitallogic/msm800sev/devicetree.cb @@ -83,4 +83,3 @@ chip northbridge/amd/lx end end - diff --git a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc b/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc index 28bf43c91c..2e560d9416 100644 --- a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc +++ b/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc @@ -70,4 +70,3 @@ __main: post_code(POST_DEAD_CODE) hlt jmp .Lhlt - diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld index 8387809996..8801f3520b 100644 --- a/src/mainboard/emulation/qemu-riscv/memlayout.ld +++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld @@ -30,4 +30,3 @@ SECTIONS PRERAM_CBMEM_CONSOLE(0x80000, 8K) RAMSTAGE(0x100000, 16M) } - diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/acpi/platform.asl b/src/mainboard/gigabyte/ga-b75m-d3h/acpi/platform.asl index 779b6d2be5..1f661cecf2 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/acpi/platform.asl +++ b/src/mainboard/gigabyte/ga-b75m-d3h/acpi/platform.asl @@ -32,4 +32,3 @@ Method(_WAK,1) { Return(Package(){0,0}) } - diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/acpi/superio.asl b/src/mainboard/gigabyte/ga-b75m-d3h/acpi/superio.asl index 12a716ceef..0706429afd 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/acpi/superio.asl +++ b/src/mainboard/gigabyte/ga-b75m-d3h/acpi/superio.asl @@ -21,4 +21,3 @@ #define SIO_EC_ENABLE_PS2K // Enable PS/2 Keyboard #define SIO_ENABLE_PS2M // Enable PS/2 Mouse - diff --git a/src/mainboard/gizmosphere/gizmo/buildOpts.c b/src/mainboard/gizmosphere/gizmo/buildOpts.c index 5cda889c89..bcd8870d0f 100644 --- a/src/mainboard/gizmosphere/gizmo/buildOpts.c +++ b/src/mainboard/gizmosphere/gizmo/buildOpts.c @@ -405,4 +405,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/gizmosphere/gizmo2/buildOpts.c b/src/mainboard/gizmosphere/gizmo2/buildOpts.c index ab9a18a6b2..c7bdab8ce0 100644 --- a/src/mainboard/gizmosphere/gizmo2/buildOpts.c +++ b/src/mainboard/gizmosphere/gizmo2/buildOpts.c @@ -463,4 +463,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/google/cosmos/chromeos.c b/src/mainboard/google/cosmos/chromeos.c index 75c5efc6cf..e287453d2d 100644 --- a/src/mainboard/google/cosmos/chromeos.c +++ b/src/mainboard/google/cosmos/chromeos.c @@ -38,4 +38,3 @@ int get_write_protect_state(void) { return 0; } - diff --git a/src/mainboard/google/link/acpi_tables.c b/src/mainboard/google/link/acpi_tables.c index 3f5adea811..071aaccacb 100644 --- a/src/mainboard/google/link/acpi_tables.c +++ b/src/mainboard/google/link/acpi_tables.c @@ -74,4 +74,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) // the lid is open by default. gnvs->lids = 1; } - diff --git a/src/mainboard/google/nyan_big/bct/spi.cfg b/src/mainboard/google/nyan_big/bct/spi.cfg index e9f85d52c6..c84fe81908 100644 --- a/src/mainboard/google/nyan_big/bct/spi.cfg +++ b/src/mainboard/google/nyan_big/bct/spi.cfg @@ -31,4 +31,3 @@ DeviceParam[3].SpiFlashParams.ReadCommandTypeFast = NV_FALSE; DeviceParam[3].SpiFlashParams.ClockDivider = 0x16; DeviceParam[3].SpiFlashParams.ClockSource = NvBootSpiClockSource_PllPOut0; DeviceParam[3].SpiFlashParams.PageSize2kor16k = 0; - diff --git a/src/mainboard/google/nyan_blaze/bct/spi.cfg b/src/mainboard/google/nyan_blaze/bct/spi.cfg index e9f85d52c6..c84fe81908 100644 --- a/src/mainboard/google/nyan_blaze/bct/spi.cfg +++ b/src/mainboard/google/nyan_blaze/bct/spi.cfg @@ -31,4 +31,3 @@ DeviceParam[3].SpiFlashParams.ReadCommandTypeFast = NV_FALSE; DeviceParam[3].SpiFlashParams.ClockDivider = 0x16; DeviceParam[3].SpiFlashParams.ClockSource = NvBootSpiClockSource_PllPOut0; DeviceParam[3].SpiFlashParams.PageSize2kor16k = 0; - diff --git a/src/mainboard/google/parrot/acpi_tables.c b/src/mainboard/google/parrot/acpi_tables.c index 14d5420aa9..0132e33fff 100644 --- a/src/mainboard/google/parrot/acpi_tables.c +++ b/src/mainboard/google/parrot/acpi_tables.c @@ -66,4 +66,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) // the lid is open by default. gnvs->lids = 1; } - diff --git a/src/mainboard/google/peppy/i915io.c b/src/mainboard/google/peppy/i915io.c index 1fbdc24af0..eb7b136be2 100644 --- a/src/mainboard/google/peppy/i915io.c +++ b/src/mainboard/google/peppy/i915io.c @@ -141,4 +141,3 @@ void runio(struct intel_dp *dp, int verbose) gtt_write(DEIIR,0x00000000); } - diff --git a/src/mainboard/google/purin/chromeos.c b/src/mainboard/google/purin/chromeos.c index 908a602254..dfe4bba8df 100644 --- a/src/mainboard/google/purin/chromeos.c +++ b/src/mainboard/google/purin/chromeos.c @@ -38,4 +38,3 @@ int get_write_protect_state(void) { return 0; } - diff --git a/src/mainboard/google/storm/mmu.h b/src/mainboard/google/storm/mmu.h index f743d64a8e..956553d2c3 100644 --- a/src/mainboard/google/storm/mmu.h +++ b/src/mainboard/google/storm/mmu.h @@ -22,4 +22,3 @@ enum dram_state { void setup_dram_mappings(enum dram_state dram); void setup_mmu(enum dram_state); - diff --git a/src/mainboard/google/stout/acpi_tables.c b/src/mainboard/google/stout/acpi_tables.c index 4fa736fc8a..587e1892d9 100644 --- a/src/mainboard/google/stout/acpi_tables.c +++ b/src/mainboard/google/stout/acpi_tables.c @@ -72,4 +72,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) /* XHCI Mode */ gnvs->xhci = XHCI_MODE; } - diff --git a/src/mainboard/google/urara/boardid.c b/src/mainboard/google/urara/boardid.c index 1d211025fd..564fd4b9f5 100644 --- a/src/mainboard/google/urara/boardid.c +++ b/src/mainboard/google/urara/boardid.c @@ -100,4 +100,3 @@ uint8_t board_id(void) return cached_board_id; } - diff --git a/src/mainboard/google/veyron_brain/chromeos.c b/src/mainboard/google/veyron_brain/chromeos.c index 20e679b67e..7eed42e14b 100644 --- a/src/mainboard/google/veyron_brain/chromeos.c +++ b/src/mainboard/google/veyron_brain/chromeos.c @@ -100,4 +100,3 @@ int get_write_protect_state(void) { return !gpio_get(GPIO_WP); } - diff --git a/src/mainboard/google/veyron_danger/chromeos.c b/src/mainboard/google/veyron_danger/chromeos.c index 20e679b67e..7eed42e14b 100644 --- a/src/mainboard/google/veyron_danger/chromeos.c +++ b/src/mainboard/google/veyron_danger/chromeos.c @@ -100,4 +100,3 @@ int get_write_protect_state(void) { return !gpio_get(GPIO_WP); } - diff --git a/src/mainboard/google/veyron_jerry/chromeos.c b/src/mainboard/google/veyron_jerry/chromeos.c index 0ab77de318..54896391a8 100644 --- a/src/mainboard/google/veyron_jerry/chromeos.c +++ b/src/mainboard/google/veyron_jerry/chromeos.c @@ -146,4 +146,3 @@ int get_write_protect_state(void) { return !gpio_get(GPIO_WP); } - diff --git a/src/mainboard/google/veyron_mickey/chromeos.c b/src/mainboard/google/veyron_mickey/chromeos.c index 20e679b67e..7eed42e14b 100644 --- a/src/mainboard/google/veyron_mickey/chromeos.c +++ b/src/mainboard/google/veyron_mickey/chromeos.c @@ -100,4 +100,3 @@ int get_write_protect_state(void) { return !gpio_get(GPIO_WP); } - diff --git a/src/mainboard/google/veyron_mighty/chromeos.c b/src/mainboard/google/veyron_mighty/chromeos.c index 0ab77de318..54896391a8 100644 --- a/src/mainboard/google/veyron_mighty/chromeos.c +++ b/src/mainboard/google/veyron_mighty/chromeos.c @@ -146,4 +146,3 @@ int get_write_protect_state(void) { return !gpio_get(GPIO_WP); } - diff --git a/src/mainboard/google/veyron_pinky/chromeos.c b/src/mainboard/google/veyron_pinky/chromeos.c index 5b44eb3d5c..5e81dad89d 100644 --- a/src/mainboard/google/veyron_pinky/chromeos.c +++ b/src/mainboard/google/veyron_pinky/chromeos.c @@ -147,4 +147,3 @@ int get_write_protect_state(void) { return !gpio_get(GPIO_WP); } - diff --git a/src/mainboard/google/veyron_rialto/chromeos.c b/src/mainboard/google/veyron_rialto/chromeos.c index 076b60445d..267c9359bc 100644 --- a/src/mainboard/google/veyron_rialto/chromeos.c +++ b/src/mainboard/google/veyron_rialto/chromeos.c @@ -111,4 +111,3 @@ int get_write_protect_state(void) { return !gpio_get(GPIO_WP); } - diff --git a/src/mainboard/google/veyron_romy/chromeos.c b/src/mainboard/google/veyron_romy/chromeos.c index 20e679b67e..7eed42e14b 100644 --- a/src/mainboard/google/veyron_romy/chromeos.c +++ b/src/mainboard/google/veyron_romy/chromeos.c @@ -100,4 +100,3 @@ int get_write_protect_state(void) { return !gpio_get(GPIO_WP); } - diff --git a/src/mainboard/google/veyron_speedy/chromeos.c b/src/mainboard/google/veyron_speedy/chromeos.c index 0ab77de318..54896391a8 100644 --- a/src/mainboard/google/veyron_speedy/chromeos.c +++ b/src/mainboard/google/veyron_speedy/chromeos.c @@ -146,4 +146,3 @@ int get_write_protect_state(void) { return !gpio_get(GPIO_WP); } - diff --git a/src/mainboard/hp/abm/buildOpts.c b/src/mainboard/hp/abm/buildOpts.c index c5d01ce407..540dfaaf2f 100644 --- a/src/mainboard/hp/abm/buildOpts.c +++ b/src/mainboard/hp/abm/buildOpts.c @@ -468,4 +468,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/hp/dl145_g1/acpi_tables.c b/src/mainboard/hp/dl145_g1/acpi_tables.c index b051518ed6..c85f380bf0 100644 --- a/src/mainboard/hp/dl145_g1/acpi_tables.c +++ b/src/mainboard/hp/dl145_g1/acpi_tables.c @@ -127,4 +127,3 @@ unsigned long acpi_fill_madt(unsigned long current) return current; } - diff --git a/src/mainboard/hp/dl145_g1/devicetree.cb b/src/mainboard/hp/dl145_g1/devicetree.cb index c955ac3b0b..2d4adee0f4 100644 --- a/src/mainboard/hp/dl145_g1/devicetree.cb +++ b/src/mainboard/hp/dl145_g1/devicetree.cb @@ -139,4 +139,3 @@ chip northbridge/amd/amdk8/root_complex end end end - diff --git a/src/mainboard/hp/dl145_g3/devicetree.cb b/src/mainboard/hp/dl145_g3/devicetree.cb index 7012cf97c5..b7f450ec06 100644 --- a/src/mainboard/hp/dl145_g3/devicetree.cb +++ b/src/mainboard/hp/dl145_g3/devicetree.cb @@ -83,5 +83,3 @@ chip northbridge/amd/amdk8/root_complex end #domain end - - diff --git a/src/mainboard/hp/dl165_g6_fam10/devicetree.cb b/src/mainboard/hp/dl165_g6_fam10/devicetree.cb index 2dbcb9b87b..e3213936d1 100644 --- a/src/mainboard/hp/dl165_g6_fam10/devicetree.cb +++ b/src/mainboard/hp/dl165_g6_fam10/devicetree.cb @@ -86,5 +86,3 @@ chip northbridge/amd/amdfam10/root_complex end #domain end - - diff --git a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb index 7de0c8399c..04d6d8d689 100644 --- a/src/mainboard/hp/e_vectra_p2706t/devicetree.cb +++ b/src/mainboard/hp/e_vectra_p2706t/devicetree.cb @@ -56,4 +56,3 @@ chip northbridge/intel/i82810 # Northbridge end end end - diff --git a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c index 02b7f75d2c..a6d66f59b7 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c @@ -429,4 +429,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { PSO_END }; - diff --git a/src/mainboard/ibm/e325/devicetree.cb b/src/mainboard/ibm/e325/devicetree.cb index bdaee50efa..f63249d02a 100644 --- a/src/mainboard/ibm/e325/devicetree.cb +++ b/src/mainboard/ibm/e325/devicetree.cb @@ -67,4 +67,3 @@ chip northbridge/amd/amdk8/root_complex end end end - diff --git a/src/mainboard/ibm/e326/devicetree.cb b/src/mainboard/ibm/e326/devicetree.cb index 1888987272..32d04a7fa9 100644 --- a/src/mainboard/ibm/e326/devicetree.cb +++ b/src/mainboard/ibm/e326/devicetree.cb @@ -71,4 +71,3 @@ chip northbridge/amd/amdk8/root_complex end end end - diff --git a/src/mainboard/iei/kino-780am2-fam10/devicetree.cb b/src/mainboard/iei/kino-780am2-fam10/devicetree.cb index d5c70330ad..1dffb4bdfe 100644 --- a/src/mainboard/iei/kino-780am2-fam10/devicetree.cb +++ b/src/mainboard/iei/kino-780am2-fam10/devicetree.cb @@ -68,4 +68,3 @@ chip northbridge/amd/amdfam10/root_complex end end #domain end #root_complex - diff --git a/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb b/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb index a6dba308db..99851b8fd7 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb +++ b/src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb @@ -73,4 +73,3 @@ chip northbridge/amd/lx end end end - diff --git a/src/mainboard/intel/eagleheights/devicetree.cb b/src/mainboard/intel/eagleheights/devicetree.cb index b37750c7e6..8d1549af19 100644 --- a/src/mainboard/intel/eagleheights/devicetree.cb +++ b/src/mainboard/intel/eagleheights/devicetree.cb @@ -70,4 +70,3 @@ chip northbridge/intel/i3100 end end end - diff --git a/src/mainboard/intel/emeraldlake2/acpi_tables.c b/src/mainboard/intel/emeraldlake2/acpi_tables.c index 1d7bcb0e88..ce42951cf9 100644 --- a/src/mainboard/intel/emeraldlake2/acpi_tables.c +++ b/src/mainboard/intel/emeraldlake2/acpi_tables.c @@ -84,4 +84,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) // Stumpy has no arms^H^H^H^HEC. gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; } - diff --git a/src/mainboard/intel/mohonpeak/acpi/platform.asl b/src/mainboard/intel/mohonpeak/acpi/platform.asl index 91f09c76bf..efefb99402 100644 --- a/src/mainboard/intel/mohonpeak/acpi/platform.asl +++ b/src/mainboard/intel/mohonpeak/acpi/platform.asl @@ -62,4 +62,3 @@ Method(_WAK,1) { Return(Package(){0,0}) } - diff --git a/src/mainboard/intel/mohonpeak/cmos.layout b/src/mainboard/intel/mohonpeak/cmos.layout index 6126d2faf2..4353e7d736 100644 --- a/src/mainboard/intel/mohonpeak/cmos.layout +++ b/src/mainboard/intel/mohonpeak/cmos.layout @@ -115,5 +115,3 @@ enumerations checksums checksum 392 415 984 - - diff --git a/src/mainboard/intel/mohonpeak/irq_tables.c b/src/mainboard/intel/mohonpeak/irq_tables.c index 9a066aad43..e7989f7cae 100644 --- a/src/mainboard/intel/mohonpeak/irq_tables.c +++ b/src/mainboard/intel/mohonpeak/irq_tables.c @@ -65,4 +65,3 @@ unsigned long write_pirq_routing_table(unsigned long addr) { return copy_pirq_routing_table(addr, &intel_irq_routing_table); } - diff --git a/src/mainboard/intel/mohonpeak/mainboard.c b/src/mainboard/intel/mohonpeak/mainboard.c index d150286d50..c2a105b375 100644 --- a/src/mainboard/intel/mohonpeak/mainboard.c +++ b/src/mainboard/intel/mohonpeak/mainboard.c @@ -32,4 +32,3 @@ static void mainboard_enable(device_t dev) struct chip_operations mainboard_ops = { .enable_dev = mainboard_enable, }; - diff --git a/src/mainboard/iwave/iWRainbowG6/devicetree.cb b/src/mainboard/iwave/iWRainbowG6/devicetree.cb index 29e9e5e38b..9addc14f3d 100644 --- a/src/mainboard/iwave/iWRainbowG6/devicetree.cb +++ b/src/mainboard/iwave/iWRainbowG6/devicetree.cb @@ -39,4 +39,3 @@ chip northbridge/intel/sch end end end - diff --git a/src/mainboard/iwill/dk8_htx/devicetree.cb b/src/mainboard/iwill/dk8_htx/devicetree.cb index 50d214be4d..c49c97a048 100644 --- a/src/mainboard/iwill/dk8_htx/devicetree.cb +++ b/src/mainboard/iwill/dk8_htx/devicetree.cb @@ -115,5 +115,3 @@ chip northbridge/amd/amdk8/root_complex end #domain end - - diff --git a/src/mainboard/iwill/dk8s2/devicetree.cb b/src/mainboard/iwill/dk8s2/devicetree.cb index fda8ca2838..21eadb3e5c 100644 --- a/src/mainboard/iwill/dk8s2/devicetree.cb +++ b/src/mainboard/iwill/dk8s2/devicetree.cb @@ -73,4 +73,3 @@ chip northbridge/amd/amdk8/root_complex end end end - diff --git a/src/mainboard/iwill/dk8x/devicetree.cb b/src/mainboard/iwill/dk8x/devicetree.cb index ea7430bccd..d92cd6d5fd 100644 --- a/src/mainboard/iwill/dk8x/devicetree.cb +++ b/src/mainboard/iwill/dk8x/devicetree.cb @@ -54,4 +54,3 @@ chip northbridge/amd/amdk8/root_complex end end end - diff --git a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c index 6043390c23..e08da559b9 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c +++ b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c @@ -333,5 +333,3 @@ const PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 1), PSO_END }; - - diff --git a/src/mainboard/kontron/kt690/devicetree.cb b/src/mainboard/kontron/kt690/devicetree.cb index 22bdae9b29..3ab33378a3 100644 --- a/src/mainboard/kontron/kt690/devicetree.cb +++ b/src/mainboard/kontron/kt690/devicetree.cb @@ -123,4 +123,3 @@ chip northbridge/amd/amdk8/root_complex end #northbridge/amd/amdk8 end #domain end #northbridge/amd/amdk8/root_complex - diff --git a/src/mainboard/kontron/ktqm77/acpi_tables.c b/src/mainboard/kontron/ktqm77/acpi_tables.c index 54ff5d471e..c2fa4bb634 100644 --- a/src/mainboard/kontron/ktqm77/acpi_tables.c +++ b/src/mainboard/kontron/ktqm77/acpi_tables.c @@ -54,4 +54,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) acpi_update_thermal_table(gnvs); } - diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c index ac1e40edd4..abbd493327 100644 --- a/src/mainboard/lenovo/g505s/buildOpts.c +++ b/src/mainboard/lenovo/g505s/buildOpts.c @@ -429,4 +429,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { PSO_END }; - diff --git a/src/mainboard/lenovo/t520/acpi_tables.c b/src/mainboard/lenovo/t520/acpi_tables.c index bb0f1a444f..e8996537ee 100644 --- a/src/mainboard/lenovo/t520/acpi_tables.c +++ b/src/mainboard/lenovo/t520/acpi_tables.c @@ -57,4 +57,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) acpi_update_thermal_table(gnvs); } - diff --git a/src/mainboard/lenovo/t530/acpi_tables.c b/src/mainboard/lenovo/t530/acpi_tables.c index bb0f1a444f..e8996537ee 100644 --- a/src/mainboard/lenovo/t530/acpi_tables.c +++ b/src/mainboard/lenovo/t530/acpi_tables.c @@ -57,4 +57,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) acpi_update_thermal_table(gnvs); } - diff --git a/src/mainboard/lenovo/x200/acpi/gm45_pci_irqs.asl b/src/mainboard/lenovo/x200/acpi/gm45_pci_irqs.asl index 76b49fa04c..93b45253bd 100644 --- a/src/mainboard/lenovo/x200/acpi/gm45_pci_irqs.asl +++ b/src/mainboard/lenovo/x200/acpi/gm45_pci_irqs.asl @@ -82,4 +82,3 @@ Method(_PRT) }) } } - diff --git a/src/mainboard/lenovo/x200/acpi/ich9_pci_irqs.asl b/src/mainboard/lenovo/x200/acpi/ich9_pci_irqs.asl index 64712621fa..3ef5d3b44a 100644 --- a/src/mainboard/lenovo/x200/acpi/ich9_pci_irqs.asl +++ b/src/mainboard/lenovo/x200/acpi/ich9_pci_irqs.asl @@ -106,4 +106,3 @@ If (PICM) { // Package() { 0x0008ffff, 0, \_SB.PCI0.LPCB.LNKE, 0}, }) } - diff --git a/src/mainboard/lenovo/x200/acpi/platform.asl b/src/mainboard/lenovo/x200/acpi/platform.asl index edcf641dea..d5cb076f5b 100644 --- a/src/mainboard/lenovo/x200/acpi/platform.asl +++ b/src/mainboard/lenovo/x200/acpi/platform.asl @@ -203,4 +203,3 @@ Scope(\_SB) // TRAP(43) // TODO } } - diff --git a/src/mainboard/lenovo/x200/cmos.layout b/src/mainboard/lenovo/x200/cmos.layout index 95659159e4..3fe028e3ec 100644 --- a/src/mainboard/lenovo/x200/cmos.layout +++ b/src/mainboard/lenovo/x200/cmos.layout @@ -141,4 +141,3 @@ enumerations checksums checksum 392 983 984 - diff --git a/src/mainboard/lenovo/x200/mainboard.c b/src/mainboard/lenovo/x200/mainboard.c index 4fb2baf206..d91e225122 100644 --- a/src/mainboard/lenovo/x200/mainboard.c +++ b/src/mainboard/lenovo/x200/mainboard.c @@ -47,4 +47,3 @@ static void mainboard_enable(device_t dev) struct chip_operations mainboard_ops = { .enable_dev = mainboard_enable, }; - diff --git a/src/mainboard/lenovo/x200/romstage.c b/src/mainboard/lenovo/x200/romstage.c index a739d18ebf..455dd356d3 100644 --- a/src/mainboard/lenovo/x200/romstage.c +++ b/src/mainboard/lenovo/x200/romstage.c @@ -201,4 +201,3 @@ void main(unsigned long bist) #endif printk(BIOS_SPEW, "exit main()\n"); } - diff --git a/src/mainboard/lenovo/x220/acpi_tables.c b/src/mainboard/lenovo/x220/acpi_tables.c index 75020ff899..9b28f0003e 100644 --- a/src/mainboard/lenovo/x220/acpi_tables.c +++ b/src/mainboard/lenovo/x220/acpi_tables.c @@ -58,4 +58,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) acpi_update_thermal_table(gnvs); } - diff --git a/src/mainboard/lenovo/x230/acpi_tables.c b/src/mainboard/lenovo/x230/acpi_tables.c index 75020ff899..9b28f0003e 100644 --- a/src/mainboard/lenovo/x230/acpi_tables.c +++ b/src/mainboard/lenovo/x230/acpi_tables.c @@ -58,4 +58,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) acpi_update_thermal_table(gnvs); } - diff --git a/src/mainboard/lippert/frontrunner-af/buildOpts.c b/src/mainboard/lippert/frontrunner-af/buildOpts.c index 23f48b6626..6adabec09b 100644 --- a/src/mainboard/lippert/frontrunner-af/buildOpts.c +++ b/src/mainboard/lippert/frontrunner-af/buildOpts.c @@ -394,4 +394,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/lippert/frontrunner/devicetree.cb b/src/mainboard/lippert/frontrunner/devicetree.cb index 239f1f902d..8e6cba0d76 100644 --- a/src/mainboard/lippert/frontrunner/devicetree.cb +++ b/src/mainboard/lippert/frontrunner/devicetree.cb @@ -18,4 +18,3 @@ chip northbridge/amd/gx2 end end end - diff --git a/src/mainboard/lippert/toucan-af/buildOpts.c b/src/mainboard/lippert/toucan-af/buildOpts.c index 23f48b6626..6adabec09b 100644 --- a/src/mainboard/lippert/toucan-af/buildOpts.c +++ b/src/mainboard/lippert/toucan-af/buildOpts.c @@ -394,4 +394,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/msi/ms6178/devicetree.cb b/src/mainboard/msi/ms6178/devicetree.cb index f33e4794d9..ab90fe23ca 100644 --- a/src/mainboard/msi/ms6178/devicetree.cb +++ b/src/mainboard/msi/ms6178/devicetree.cb @@ -81,4 +81,3 @@ chip northbridge/intel/i82810 # Northbridge end end end - diff --git a/src/mainboard/msi/ms9185/devicetree.cb b/src/mainboard/msi/ms9185/devicetree.cb index 013bba3291..3c9168d2ee 100644 --- a/src/mainboard/msi/ms9185/devicetree.cb +++ b/src/mainboard/msi/ms9185/devicetree.cb @@ -83,5 +83,3 @@ chip northbridge/amd/amdk8/root_complex end # amdk8 end #domain end - - diff --git a/src/mainboard/nec/powermate2000/devicetree.cb b/src/mainboard/nec/powermate2000/devicetree.cb index cd4aefe4e5..a3f164e968 100644 --- a/src/mainboard/nec/powermate2000/devicetree.cb +++ b/src/mainboard/nec/powermate2000/devicetree.cb @@ -51,4 +51,3 @@ chip northbridge/intel/i82810 # Northbridge end end end - diff --git a/src/mainboard/newisys/khepri/devicetree.cb b/src/mainboard/newisys/khepri/devicetree.cb index bd00d2884c..8f7455ce27 100644 --- a/src/mainboard/newisys/khepri/devicetree.cb +++ b/src/mainboard/newisys/khepri/devicetree.cb @@ -79,4 +79,3 @@ chip northbridge/amd/amdk8/root_complex end end end - diff --git a/src/mainboard/packardbell/ms2290/acpi_tables.c b/src/mainboard/packardbell/ms2290/acpi_tables.c index 73b9fff1b7..2dd9da8b9c 100644 --- a/src/mainboard/packardbell/ms2290/acpi_tables.c +++ b/src/mainboard/packardbell/ms2290/acpi_tables.c @@ -34,4 +34,3 @@ void acpi_create_gnvs(global_nvs_t * gnvs) { } - diff --git a/src/mainboard/pcengines/alix1c/devicetree.cb b/src/mainboard/pcengines/alix1c/devicetree.cb index 85e967ad86..20e865ab60 100644 --- a/src/mainboard/pcengines/alix1c/devicetree.cb +++ b/src/mainboard/pcengines/alix1c/devicetree.cb @@ -83,4 +83,3 @@ chip northbridge/amd/lx end end - diff --git a/src/mainboard/pcengines/alix2d/devicetree.cb b/src/mainboard/pcengines/alix2d/devicetree.cb index d8aa3bc491..f8368ed7fa 100644 --- a/src/mainboard/pcengines/alix2d/devicetree.cb +++ b/src/mainboard/pcengines/alix2d/devicetree.cb @@ -43,4 +43,3 @@ chip northbridge/amd/lx end end - diff --git a/src/mainboard/pcengines/alix6/board_info.txt b/src/mainboard/pcengines/alix6/board_info.txt index db8bbb2de3..6af0ddf53f 100644 --- a/src/mainboard/pcengines/alix6/board_info.txt +++ b/src/mainboard/pcengines/alix6/board_info.txt @@ -2,4 +2,3 @@ Category: half Board URL: http://pcengines.ch/alix6f2.htm Flashrom support: y Clone of: pcengines/alix2d - diff --git a/src/mainboard/pcengines/apu1/buildOpts.c b/src/mainboard/pcengines/apu1/buildOpts.c index f3db4f0202..03c5d1725b 100644 --- a/src/mainboard/pcengines/apu1/buildOpts.c +++ b/src/mainboard/pcengines/apu1/buildOpts.c @@ -403,4 +403,3 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { */ #include "mm.h" #include "mn.h" - diff --git a/src/mainboard/rca/rm4100/devicetree.cb b/src/mainboard/rca/rm4100/devicetree.cb index d39126ce79..7c31423c6d 100644 --- a/src/mainboard/rca/rm4100/devicetree.cb +++ b/src/mainboard/rca/rm4100/devicetree.cb @@ -65,4 +65,3 @@ chip northbridge/intel/i82830 # Northbridge end end end - diff --git a/src/mainboard/roda/rk9/Makefile.inc b/src/mainboard/roda/rk9/Makefile.inc index d6838b7b4b..aa59e72524 100644 --- a/src/mainboard/roda/rk9/Makefile.inc +++ b/src/mainboard/roda/rk9/Makefile.inc @@ -19,4 +19,3 @@ ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += ti_pci7xx1.c ramstage-y += cstates.c - diff --git a/src/mainboard/samsung/stumpy/acpi_tables.c b/src/mainboard/samsung/stumpy/acpi_tables.c index 04e3bd0fb6..f6275b4df8 100644 --- a/src/mainboard/samsung/stumpy/acpi_tables.c +++ b/src/mainboard/samsung/stumpy/acpi_tables.c @@ -85,4 +85,3 @@ void acpi_create_gnvs(global_nvs_t *gnvs) // Stumpy has no arms^H^H^H^HEC. gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; } - diff --git a/src/mainboard/siemens/sitemp_g1p1/acpi_tables.c b/src/mainboard/siemens/sitemp_g1p1/acpi_tables.c index dbb3229896..3337c6d9d1 100644 --- a/src/mainboard/siemens/sitemp_g1p1/acpi_tables.c +++ b/src/mainboard/siemens/sitemp_g1p1/acpi_tables.c @@ -105,4 +105,3 @@ void mainboard_inject_dsdt(device_t device) acpigen_pop_len(); } } - diff --git a/src/mainboard/siemens/sitemp_g1p1/devicetree.cb b/src/mainboard/siemens/sitemp_g1p1/devicetree.cb index 1d83f10579..e47703f738 100644 --- a/src/mainboard/siemens/sitemp_g1p1/devicetree.cb +++ b/src/mainboard/siemens/sitemp_g1p1/devicetree.cb @@ -132,4 +132,3 @@ chip northbridge/amd/amdk8/root_complex end #northbridge/amd/amdk8 end #domain end #northbridge/amd/amdk8/root_complex - diff --git a/src/mainboard/supermicro/h8dmr_fam10/README b/src/mainboard/supermicro/h8dmr_fam10/README index 485e7c852c..1d7bbdc822 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/README +++ b/src/mainboard/supermicro/h8dmr_fam10/README @@ -20,4 +20,3 @@ disabled in CBFS. I'm not sure what's causing this particular slowness. See also this thread: http://www.coreboot.org/pipermail/coreboot/2009-September/052107.html Ward, 2009-09-22 - diff --git a/src/mainboard/supermicro/h8qgi/Kconfig b/src/mainboard/supermicro/h8qgi/Kconfig index 2ee1353252..f5d69d4ab7 100644 --- a/src/mainboard/supermicro/h8qgi/Kconfig +++ b/src/mainboard/supermicro/h8qgi/Kconfig @@ -74,4 +74,3 @@ config VGA_BIOS_ID default "102b,0532" endif # BOARD_SUPERMICRO_H8QGI - diff --git a/src/mainboard/supermicro/h8qgi/devicetree.cb b/src/mainboard/supermicro/h8qgi/devicetree.cb index 2622209be0..59740c9b5b 100644 --- a/src/mainboard/supermicro/h8qgi/devicetree.cb +++ b/src/mainboard/supermicro/h8qgi/devicetree.cb @@ -135,4 +135,3 @@ chip northbridge/amd/agesa/family15/root_complex end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family15/root_complex - diff --git a/src/mainboard/supermicro/h8scm/devicetree.cb b/src/mainboard/supermicro/h8scm/devicetree.cb index 2529902ce1..b8fb82335b 100644 --- a/src/mainboard/supermicro/h8scm/devicetree.cb +++ b/src/mainboard/supermicro/h8scm/devicetree.cb @@ -130,4 +130,3 @@ chip northbridge/amd/agesa/family15/root_complex end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family15/root_complex - diff --git a/src/mainboard/supermicro/h8scm_fam10/devicetree.cb b/src/mainboard/supermicro/h8scm_fam10/devicetree.cb index 9dda5d8150..82229da9ba 100644 --- a/src/mainboard/supermicro/h8scm_fam10/devicetree.cb +++ b/src/mainboard/supermicro/h8scm_fam10/devicetree.cb @@ -121,5 +121,3 @@ chip northbridge/amd/amdfam10/root_complex # end #domain end - - diff --git a/src/mainboard/technexion/tim5690/devicetree.cb b/src/mainboard/technexion/tim5690/devicetree.cb index 23b9741b9f..bf462e213a 100644 --- a/src/mainboard/technexion/tim5690/devicetree.cb +++ b/src/mainboard/technexion/tim5690/devicetree.cb @@ -110,4 +110,3 @@ chip northbridge/amd/amdk8/root_complex end #northbridge/amd/amdk8 end #domain end #northbridge/amd/amdk8/root_complex - diff --git a/src/mainboard/technexion/tim8690/devicetree.cb b/src/mainboard/technexion/tim8690/devicetree.cb index ff14075563..8d1df8be10 100644 --- a/src/mainboard/technexion/tim8690/devicetree.cb +++ b/src/mainboard/technexion/tim8690/devicetree.cb @@ -113,4 +113,3 @@ chip northbridge/amd/amdk8/root_complex end #northbridge/amd/amdk8 end #domain end #northbridge/amd/amdk8/root_complex - diff --git a/src/mainboard/tyan/s2735/devicetree.cb b/src/mainboard/tyan/s2735/devicetree.cb index d3b6b1eefe..866bdc510e 100644 --- a/src/mainboard/tyan/s2735/devicetree.cb +++ b/src/mainboard/tyan/s2735/devicetree.cb @@ -83,4 +83,3 @@ chip northbridge/intel/e7501 end end end - diff --git a/src/mainboard/tyan/s2850/devicetree.cb b/src/mainboard/tyan/s2850/devicetree.cb index 85c63848df..2698542401 100644 --- a/src/mainboard/tyan/s2850/devicetree.cb +++ b/src/mainboard/tyan/s2850/devicetree.cb @@ -93,4 +93,3 @@ chip northbridge/amd/amdk8/root_complex end end end - diff --git a/src/mainboard/tyan/s2875/devicetree.cb b/src/mainboard/tyan/s2875/devicetree.cb index 39eb8b2364..bdb4705ed5 100644 --- a/src/mainboard/tyan/s2875/devicetree.cb +++ b/src/mainboard/tyan/s2875/devicetree.cb @@ -85,4 +85,3 @@ chip northbridge/amd/amdk8/root_complex end end end - diff --git a/src/mainboard/tyan/s2880/devicetree.cb b/src/mainboard/tyan/s2880/devicetree.cb index f9f48566ea..3e18f5529f 100644 --- a/src/mainboard/tyan/s2880/devicetree.cb +++ b/src/mainboard/tyan/s2880/devicetree.cb @@ -96,4 +96,3 @@ chip northbridge/amd/amdk8/root_complex end end end - diff --git a/src/mainboard/tyan/s2881/devicetree.cb b/src/mainboard/tyan/s2881/devicetree.cb index aab75a3939..7d0ed5e604 100644 --- a/src/mainboard/tyan/s2881/devicetree.cb +++ b/src/mainboard/tyan/s2881/devicetree.cb @@ -127,4 +127,3 @@ chip northbridge/amd/amdk8/root_complex end end end - diff --git a/src/mainboard/tyan/s2882/devicetree.cb b/src/mainboard/tyan/s2882/devicetree.cb index 40746956b3..74a26d0233 100644 --- a/src/mainboard/tyan/s2882/devicetree.cb +++ b/src/mainboard/tyan/s2882/devicetree.cb @@ -123,4 +123,3 @@ chip northbridge/amd/amdk8/root_complex end # NB end #domain end - diff --git a/src/mainboard/tyan/s2885/devicetree.cb b/src/mainboard/tyan/s2885/devicetree.cb index 7191e5216f..97a18e5a69 100644 --- a/src/mainboard/tyan/s2885/devicetree.cb +++ b/src/mainboard/tyan/s2885/devicetree.cb @@ -120,4 +120,3 @@ chip northbridge/amd/amdk8/root_complex end #domain end - diff --git a/src/mainboard/tyan/s4880/devicetree.cb b/src/mainboard/tyan/s4880/devicetree.cb index da59eb5b9c..d64d054c29 100644 --- a/src/mainboard/tyan/s4880/devicetree.cb +++ b/src/mainboard/tyan/s4880/devicetree.cb @@ -96,4 +96,3 @@ chip northbridge/amd/amdk8/root_complex end #domain end - diff --git a/src/mainboard/tyan/s4882/devicetree.cb b/src/mainboard/tyan/s4882/devicetree.cb index 44da2c29a2..0eb59afdd1 100644 --- a/src/mainboard/tyan/s4882/devicetree.cb +++ b/src/mainboard/tyan/s4882/devicetree.cb @@ -193,4 +193,3 @@ chip northbridge/amd/amdk8/root_complex end end - diff --git a/src/mainboard/tyan/s8226/devicetree.cb b/src/mainboard/tyan/s8226/devicetree.cb index 0080d6295f..64701a5e99 100644 --- a/src/mainboard/tyan/s8226/devicetree.cb +++ b/src/mainboard/tyan/s8226/devicetree.cb @@ -130,4 +130,3 @@ chip northbridge/amd/agesa/family15/root_complex end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex end #domain end #northbridge/amd/agesa/family15/root_complex - diff --git a/src/mainboard/via/vt8454c/Kconfig b/src/mainboard/via/vt8454c/Kconfig index da71c8796b..408206c7f0 100644 --- a/src/mainboard/via/vt8454c/Kconfig +++ b/src/mainboard/via/vt8454c/Kconfig @@ -24,4 +24,3 @@ config IRQ_SLOT_COUNT default 15 endif # BOARD_VIA_VT8454C - diff --git a/src/mainboard/via/vt8454c/devicetree.cb b/src/mainboard/via/vt8454c/devicetree.cb index 87d2ed1502..efb5b6c67a 100644 --- a/src/mainboard/via/vt8454c/devicetree.cb +++ b/src/mainboard/via/vt8454c/devicetree.cb @@ -51,4 +51,3 @@ chip northbridge/via/cx700 #device pci 12.0 on end # Ethernet end # pci domain 0 end # cx700 - diff --git a/src/mainboard/winent/pl6064/devicetree.cb b/src/mainboard/winent/pl6064/devicetree.cb index f900f78b5a..20d7561e6e 100644 --- a/src/mainboard/winent/pl6064/devicetree.cb +++ b/src/mainboard/winent/pl6064/devicetree.cb @@ -78,4 +78,3 @@ chip northbridge/amd/lx end end end - diff --git a/src/mainboard/wyse/s50/devicetree.cb b/src/mainboard/wyse/s50/devicetree.cb index d433ba3204..5f0435d917 100644 --- a/src/mainboard/wyse/s50/devicetree.cb +++ b/src/mainboard/wyse/s50/devicetree.cb @@ -48,4 +48,3 @@ chip northbridge/amd/gx2 end end end - |