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-rw-r--r--src/mainboard/tyan/Kconfig8
-rw-r--r--src/mainboard/tyan/s2735/Kconfig62
-rw-r--r--src/mainboard/tyan/s2735/Makefile.inc66
-rw-r--r--src/mainboard/tyan/s2880/Kconfig123
-rw-r--r--src/mainboard/tyan/s2880/Makefile.inc70
-rw-r--r--src/mainboard/tyan/s2881/Makefile.inc2
-rw-r--r--src/mainboard/tyan/s2882/Kconfig123
-rw-r--r--src/mainboard/tyan/s2882/Makefile.inc70
-rw-r--r--src/mainboard/tyan/s2885/Kconfig123
-rw-r--r--src/mainboard/tyan/s2885/Makefile.inc1
-rw-r--r--src/mainboard/tyan/s2912/Kconfig149
-rw-r--r--src/mainboard/tyan/s2912/Makefile.inc66
-rw-r--r--src/mainboard/tyan/s2912_fam10/Kconfig162
-rw-r--r--src/mainboard/tyan/s2912_fam10/Makefile.inc66
-rw-r--r--src/mainboard/tyan/s4880/Kconfig105
-rw-r--r--src/mainboard/tyan/s4880/Makefile.inc52
-rw-r--r--src/mainboard/tyan/s4882/Kconfig105
-rw-r--r--src/mainboard/tyan/s4882/Makefile.inc52
18 files changed, 1404 insertions, 1 deletions
diff --git a/src/mainboard/tyan/Kconfig b/src/mainboard/tyan/Kconfig
index be6ebd44e3..6c35b3d48c 100644
--- a/src/mainboard/tyan/Kconfig
+++ b/src/mainboard/tyan/Kconfig
@@ -23,10 +23,18 @@ choice
depends on VENDOR_TYAN
source "src/mainboard/tyan/s1846/Kconfig"
+source "src/mainboard/tyan/s2735/Kconfig"
+source "src/mainboard/tyan/s2880/Kconfig"
source "src/mainboard/tyan/s2881/Kconfig"
+source "src/mainboard/tyan/s2882/Kconfig"
+source "src/mainboard/tyan/s2885/Kconfig"
source "src/mainboard/tyan/s2891/Kconfig"
source "src/mainboard/tyan/s2892/Kconfig"
source "src/mainboard/tyan/s2895/Kconfig"
+source "src/mainboard/tyan/s2912/Kconfig"
+source "src/mainboard/tyan/s2912_fam10/Kconfig"
+source "src/mainboard/tyan/s4880/Kconfig"
+source "src/mainboard/tyan/s4882/Kconfig"
endchoice
diff --git a/src/mainboard/tyan/s2735/Kconfig b/src/mainboard/tyan/s2735/Kconfig
new file mode 100644
index 0000000000..e39c5ea98a
--- /dev/null
+++ b/src/mainboard/tyan/s2735/Kconfig
@@ -0,0 +1,62 @@
+config BOARD_TYAN_S2735
+ bool "S2735"
+ select ARCH_X86
+ select CPU_INTEL_SOCKET_MPGA604
+ select NORTHBRIDGE_INTEL_E7501
+ select SOUTHBRIDGE_INTEL_I82870
+ select SOUTHBRIDGE_INTEL_I82801ER
+ select SUPERIO_WINBOND_W83627HF
+ select HAVE_PIRQ_TABLE
+ select UDELAY_TSC
+ select HAVE_OPTION_TABLE
+ select USE_DCACHE_RAM
+
+config MAINBOARD_DIR
+ string
+ default tyan/s2735
+ depends on BOARD_TYAN_S2735
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xcf000
+ depends on BOARD_TYAN_S2735
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x1000
+ depends on BOARD_TYAN_S2735
+
+config LB_CKS_RANGE_START
+ int
+ default 49
+ depends on BOARD_TYAN_S2735
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_TYAN_S2735
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_TYAN_S2735
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "S2735"
+ depends on BOARD_TYAN_S2735
+
+config IRQ_SLOT_COUNT
+ int
+ default 15
+ depends on BOARD_TYAN_S2735
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_TYAN_S2735
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 2
+ depends on BOARD_TYAN_S2735
diff --git a/src/mainboard/tyan/s2735/Makefile.inc b/src/mainboard/tyan/s2735/Makefile.inc
new file mode 100644
index 0000000000..0d3f8965e8
--- /dev/null
+++ b/src/mainboard/tyan/s2735/Makefile.inc
@@ -0,0 +1,66 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+##
+## This mainboard requires DCACHE_AS_RAM enabled. It won't work without.
+##
+
+driver-y += mainboard.o
+
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+#driver-y += ../../../drivers/i2c/i2cmux/i2cmux.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/x86/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+ldscript-y += ../../../../src/cpu/x86/car/cache_as_ram.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
+ iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
+ mv dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/tyan/s2880/Kconfig b/src/mainboard/tyan/s2880/Kconfig
new file mode 100644
index 0000000000..d66c2b7606
--- /dev/null
+++ b/src/mainboard/tyan/s2880/Kconfig
@@ -0,0 +1,123 @@
+config BOARD_TYAN_S2880
+ bool "Thunder K8SR (S2880)"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_940
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_AMD_AMD8131
+ select SOUTHBRIDGE_AMD_AMD8111
+ select SUPERIO_WINBOND_W83627HF
+ select PIRQ_TABLE
+ select SERIAL_CPU_INIT
+ select AP_CODE_IN_CAR
+
+config MAINBOARD_DIR
+ string
+ default tyan/s2880
+ depends on BOARD_TYAN_S2880
+
+config APIC_ID_OFFSET
+ hex
+ default 0x10
+ depends on BOARD_TYAN_S2880
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_TYAN_S2880
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_TYAN_S2880
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_TYAN_S2880
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "s2880"
+ depends on BOARD_TYAN_S2880
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x2880
+ depends on BOARD_TYAN_S2880
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_TYAN_S2880
+
+config MEM_TRAIN_SEQ
+ bool
+ default n
+ depends on BOARD_TYAN_S2880
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_TYAN_S2880
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 2
+ depends on BOARD_TYAN_S2880
+
+config MEM_TRAIN_SEQ
+ bool
+ default n
+ depends on BOARD_TYAN_S2880
+
+config AP_CODE_IN_CAR
+ bool
+ default n
+ depends on BOARD_TYAN_S2880
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_TYAN_S2880
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0xa
+ depends on BOARD_TYAN_S2880
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x6
+ depends on BOARD_TYAN_S2880
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2880
+
+config WAIT_BEFORE_CPUS_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2880
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 0
+ depends on BOARD_TYAN_S2880
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ bool
+ default n
+ depends on BOARD_TYAN_S2880
+
+config HAVE_ACPI_TABLES
+ bool "Generate ACPI tables"
+ default n
+ depends on BOARD_TYAN_S2880
+
+config IRQ_SLOT_COUNT
+ int
+ default 9
+ depends on BOARD_TYAN_S2880
diff --git a/src/mainboard/tyan/s2880/Makefile.inc b/src/mainboard/tyan/s2880/Makefile.inc
new file mode 100644
index 0000000000..d6fcb7b33a
--- /dev/null
+++ b/src/mainboard/tyan/s2880/Makefile.inc
@@ -0,0 +1,70 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+##
+## This mainboard requires DCACHE_AS_RAM enabled. It won't work without.
+##
+
+driver-y += mainboard.o
+
+#needed by irq_tables and mptable and acpi_tables
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+
+#driver-y += ../../../drivers/i2c/i2cmux/i2cmux.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/southbridge/nvidia/ck804/id.inc
+crt0-y += ../../../../src/southbridge/nvidia/ck804/romstrap.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/southbridge/nvidia/ck804/id.lds
+ldscript-y += ../../../../src/southbridge/nvidia/ck804/romstrap.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
+ iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
+ mv dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/tyan/s2881/Makefile.inc b/src/mainboard/tyan/s2881/Makefile.inc
index c87d45d32a..0ab1471e1b 100644
--- a/src/mainboard/tyan/s2881/Makefile.inc
+++ b/src/mainboard/tyan/s2881/Makefile.inc
@@ -1,2 +1,2 @@
include $(src)/mainboard/tyan/Makefile.s289x.inc
-driver-$(CONFIG_BOARD_TYAN_S2881) += ../../../drivers/i2c/adm1027/adm1027.o
+driver-y += ../../../drivers/i2c/adm1027/adm1027.o
diff --git a/src/mainboard/tyan/s2882/Kconfig b/src/mainboard/tyan/s2882/Kconfig
new file mode 100644
index 0000000000..1c5b971b6e
--- /dev/null
+++ b/src/mainboard/tyan/s2882/Kconfig
@@ -0,0 +1,123 @@
+config BOARD_TYAN_S2882
+ bool "Thunder K8SR (S2882)"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_940
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_AMD_AMD8131
+ select SOUTHBRIDGE_AMD_AMD8111
+ select SUPERIO_WINBOND_W83627HF
+ select PIRQ_TABLE
+ select SERIAL_CPU_INIT
+ select AP_CODE_IN_CAR
+
+config MAINBOARD_DIR
+ string
+ default tyan/s2882
+ depends on BOARD_TYAN_S2882
+
+config APIC_ID_OFFSET
+ hex
+ default 0x10
+ depends on BOARD_TYAN_S2882
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_TYAN_S2882
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_TYAN_S2882
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_TYAN_S2882
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "s2882"
+ depends on BOARD_TYAN_S2882
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x2882
+ depends on BOARD_TYAN_S2882
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_TYAN_S2882
+
+config MEM_TRAIN_SEQ
+ bool
+ default n
+ depends on BOARD_TYAN_S2882
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_TYAN_S2882
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 2
+ depends on BOARD_TYAN_S2882
+
+config MEM_TRAIN_SEQ
+ bool
+ default n
+ depends on BOARD_TYAN_S2882
+
+config AP_CODE_IN_CAR
+ bool
+ default n
+ depends on BOARD_TYAN_S2882
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_TYAN_S2882
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0xa
+ depends on BOARD_TYAN_S2882
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x6
+ depends on BOARD_TYAN_S2882
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2882
+
+config WAIT_BEFORE_CPUS_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2882
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 0
+ depends on BOARD_TYAN_S2882
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ bool
+ default n
+ depends on BOARD_TYAN_S2882
+
+config HAVE_ACPI_TABLES
+ bool "Generate ACPI tables"
+ default n
+ depends on BOARD_TYAN_S2882
+
+config IRQ_SLOT_COUNT
+ int
+ default 9
+ depends on BOARD_TYAN_S2882
diff --git a/src/mainboard/tyan/s2882/Makefile.inc b/src/mainboard/tyan/s2882/Makefile.inc
new file mode 100644
index 0000000000..d6fcb7b33a
--- /dev/null
+++ b/src/mainboard/tyan/s2882/Makefile.inc
@@ -0,0 +1,70 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+##
+## This mainboard requires DCACHE_AS_RAM enabled. It won't work without.
+##
+
+driver-y += mainboard.o
+
+#needed by irq_tables and mptable and acpi_tables
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
+obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
+
+#driver-y += ../../../drivers/i2c/i2cmux/i2cmux.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/southbridge/nvidia/ck804/id.inc
+crt0-y += ../../../../src/southbridge/nvidia/ck804/romstrap.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/southbridge/nvidia/ck804/id.lds
+ldscript-y += ../../../../src/southbridge/nvidia/ck804/romstrap.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
+ iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
+ mv dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/tyan/s2885/Kconfig b/src/mainboard/tyan/s2885/Kconfig
new file mode 100644
index 0000000000..3d7616ea81
--- /dev/null
+++ b/src/mainboard/tyan/s2885/Kconfig
@@ -0,0 +1,123 @@
+config BOARD_TYAN_S2885
+ bool "Thunder K8SR (S2885)"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_940
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_AMD_AMD8131
+ select SOUTHBRIDGE_AMD_AMD8111
+ select SUPERIO_WINBOND_W83627HF
+ select PIRQ_TABLE
+ select SERIAL_CPU_INIT
+ select AP_CODE_IN_CAR
+
+config MAINBOARD_DIR
+ string
+ default tyan/s2885
+ depends on BOARD_TYAN_S2885
+
+config APIC_ID_OFFSET
+ hex
+ default 0x10
+ depends on BOARD_TYAN_S2885
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_TYAN_S2885
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_TYAN_S2885
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_TYAN_S2885
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "s2885"
+ depends on BOARD_TYAN_S2885
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x2885
+ depends on BOARD_TYAN_S2885
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_TYAN_S2885
+
+config MEM_TRAIN_SEQ
+ bool
+ default n
+ depends on BOARD_TYAN_S2885
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_TYAN_S2885
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 2
+ depends on BOARD_TYAN_S2885
+
+config MEM_TRAIN_SEQ
+ bool
+ default n
+ depends on BOARD_TYAN_S2885
+
+config AP_CODE_IN_CAR
+ bool
+ default n
+ depends on BOARD_TYAN_S2885
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_TYAN_S2885
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0xa
+ depends on BOARD_TYAN_S2885
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x6
+ depends on BOARD_TYAN_S2885
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2885
+
+config WAIT_BEFORE_CPUS_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2885
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 0
+ depends on BOARD_TYAN_S2885
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ bool
+ default n
+ depends on BOARD_TYAN_S2885
+
+config HAVE_ACPI_TABLES
+ bool "Generate ACPI tables"
+ default n
+ depends on BOARD_TYAN_S2885
+
+config IRQ_SLOT_COUNT
+ int
+ default 9
+ depends on BOARD_TYAN_S2885
diff --git a/src/mainboard/tyan/s2885/Makefile.inc b/src/mainboard/tyan/s2885/Makefile.inc
new file mode 100644
index 0000000000..88582f5329
--- /dev/null
+++ b/src/mainboard/tyan/s2885/Makefile.inc
@@ -0,0 +1 @@
+include $(src)/mainboard/tyan/Makefile.s289x.inc
diff --git a/src/mainboard/tyan/s2912/Kconfig b/src/mainboard/tyan/s2912/Kconfig
new file mode 100644
index 0000000000..ff05979f74
--- /dev/null
+++ b/src/mainboard/tyan/s2912/Kconfig
@@ -0,0 +1,149 @@
+
+config BOARD_TYAN_S2912
+ bool "S2912"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_F
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_NVIDIA_MCP55
+ select SUPERIO_WINBOND_W83627HF
+ select PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select HAVE_HIGH_TABLES
+ select IOAPIC
+ select MEM_TRAIN_SEQ
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select K8_REV_F_SUPPORT
+
+config MAINBOARD_DIR
+ string
+ default tyan/s2912
+ depends on BOARD_TYAN_S2912
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+ depends on BOARD_TYAN_S2912
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x08000
+ depends on BOARD_TYAN_S2912
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_TYAN_S2912
+
+config APIC_ID_OFFSET
+ hex
+ default 16
+ depends on BOARD_TYAN_S2912
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_TYAN_S2912
+
+config LB_CKS_RANGE_START
+ int
+ default 49
+ depends on BOARD_TYAN_S2912
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_TYAN_S2912
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_TYAN_S2912
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "S2912"
+ depends on BOARD_TYAN_S2912
+
+config PCI_64BIT_PREF_MEM
+ bool
+ default n
+ depends on BOARD_TYAN_S2912
+
+config HAVE_FALLBACK_BOOT
+ bool
+ default n
+ depends on BOARD_TYAN_S2912
+
+config USE_FALLBACK_IMAGE
+ bool
+ default n
+ depends on BOARD_TYAN_S2912
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_TYAN_S2912
+
+config MAX_CPUS
+ int
+ default 2
+ depends on BOARD_TYAN_S2912
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 1
+ depends on BOARD_TYAN_S2912
+
+config AP_CODE_IN_CAR
+ bool
+ default n
+ depends on BOARD_TYAN_S2912
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_TYAN_S2912
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_TYAN_S2912
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_TYAN_S2912
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2912
+
+config SERIAL_CPU_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2912
+
+config WAIT_BEFORE_CPUS_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2912
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x1022
+ depends on BOARD_TYAN_S2912
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x2b80
+ depends on BOARD_TYAN_S2912
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_TYAN_S2912
diff --git a/src/mainboard/tyan/s2912/Makefile.inc b/src/mainboard/tyan/s2912/Makefile.inc
new file mode 100644
index 0000000000..83271c2a4c
--- /dev/null
+++ b/src/mainboard/tyan/s2912/Makefile.inc
@@ -0,0 +1,66 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+#needed by irq_tables and mptable and acpi_tables
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
+
+# This is part of the conversion to init-obj and away from included code.
+initobj-y += crt0.o
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ mv $(obj)/dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
diff --git a/src/mainboard/tyan/s2912_fam10/Kconfig b/src/mainboard/tyan/s2912_fam10/Kconfig
new file mode 100644
index 0000000000..9b1eb2a7fa
--- /dev/null
+++ b/src/mainboard/tyan/s2912_fam10/Kconfig
@@ -0,0 +1,162 @@
+
+config BOARD_TYAN_S2912_FAM10
+ bool "S2912_FAM10"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_F_1207
+ select NORTHBRIDGE_AMD_AMDFAM10
+ select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
+ select SOUTHBRIDGE_NVIDIA_MCP55
+ select SUPERIO_WINBOND_W83627HF
+ select PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select IOAPIC
+ select MEM_TRAIN_SEQ
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+
+config MAINBOARD_DIR
+ string
+ default tyan/s2912_fam10
+ depends on BOARD_TYAN_S2912_FAM10
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+ depends on BOARD_TYAN_S2912_FAM10
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x08000
+ depends on BOARD_TYAN_S2912_FAM10
+
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_TYAN_S2912_FAM10
+
+config APIC_ID_OFFSET
+ hex
+ default 16
+ depends on BOARD_TYAN_S2912_FAM10
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_TYAN_S2912_FAM10
+
+config LB_CKS_RANGE_START
+ int
+ default 49
+ depends on BOARD_TYAN_S2912_FAM10
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_TYAN_S2912_FAM10
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_TYAN_S2912_FAM10
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "S2912 (Fam10)"
+ depends on BOARD_TYAN_S2912_FAM10
+
+config PCI_64BIT_PREF_MEM
+ bool
+ default n
+ depends on BOARD_TYAN_S2912_FAM10
+
+config HAVE_FALLBACK_BOOT
+ bool
+ default n
+ depends on BOARD_TYAN_S2912_FAM10
+
+config USE_FALLBACK_IMAGE
+ bool
+ default n
+ depends on BOARD_TYAN_S2912_FAM10
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_TYAN_S2912_FAM10
+
+config MAX_CPUS
+ int
+ default 2
+ depends on BOARD_TYAN_S2912_FAM10
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 1
+ depends on BOARD_TYAN_S2912_FAM10
+
+config AP_CODE_IN_CAR
+ bool
+ default n
+ depends on BOARD_TYAN_S2912_FAM10
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+ bool
+ default n
+ depends on BOARD_TYAN_S2912_FAM10
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_TYAN_S2912_FAM10
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_TYAN_S2912_FAM10
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2912_FAM10
+
+config SERIAL_CPU_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2912_FAM10
+
+config WAIT_BEFORE_CPUS_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S2912_FAM10
+
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x10f1
+ depends on BOARD_TYAN_S2912_FAM10
+
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x2912
+ depends on BOARD_TYAN_S2912_FAM10
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_TYAN_S2912_FAM10
+
+config AMD_UCODE_PATCH_FILE
+ string
+ default "mc_patch_01000095.h"
+ depends on BOARD_TYAN_S2912_FAM10
+
+config ENABLE_APIC_EXT_ID
+ bool
+ default y
+ depends on BOARD_TYAN_S2912_FAM10
+
+config AMDMCT
+ bool
+ default y
+ depends on BOARD_TYAN_S2912_FAM10
diff --git a/src/mainboard/tyan/s2912_fam10/Makefile.inc b/src/mainboard/tyan/s2912_fam10/Makefile.inc
new file mode 100644
index 0000000000..83271c2a4c
--- /dev/null
+++ b/src/mainboard/tyan/s2912_fam10/Makefile.inc
@@ -0,0 +1,66 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+#needed by irq_tables and mptable and acpi_tables
+obj-y += get_bus_conf.o
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
+
+# This is part of the conversion to init-obj and away from included code.
+initobj-y += crt0.o
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/id.inc
+crt0-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/id.lds
+ldscript-y += ../../../../src/southbridge/nvidia/mcp55/romstrap.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+ldscript-$(CONFIG_AP_CODE_IN_CAR) += ../../../../src/arch/i386/init/ldscript_apc.lb
+
+ifdef POST_EVALUATION
+
+$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
+ mv $(obj)/dsdt.hex $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
diff --git a/src/mainboard/tyan/s4880/Kconfig b/src/mainboard/tyan/s4880/Kconfig
new file mode 100644
index 0000000000..1a0c9fe4d7
--- /dev/null
+++ b/src/mainboard/tyan/s4880/Kconfig
@@ -0,0 +1,105 @@
+config BOARD_TYAN_S4880
+ bool "S4880"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_940
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_AMD_AMD8111
+ select SOUTHBRIDGE_AMD_AMD8131
+ select SUPERIO_WINBOND_W83627HF
+ select HAVE_PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select IOAPIC
+
+config MAINBOARD_DIR
+ string
+ default tyan/s4880
+ depends on BOARD_TYAN_S4880
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xcf000
+ depends on BOARD_TYAN_S4880
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_TYAN_S4880
+
+config APIC_ID_OFFSET
+ hex
+ default 0x10
+ depends on BOARD_TYAN_S4880
+
+config K8_REV_F_SUPPORT
+ bool
+ default n
+ depends on BOARD_TYAN_S4880
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_TYAN_S4880
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ bool
+ default n
+ depends on BOARD_TYAN_S4880
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_TYAN_S4880
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_TYAN_S4880
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "S4880"
+ depends on BOARD_TYAN_S4880
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_TYAN_S4880
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_TYAN_S4880
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 2
+ depends on BOARD_TYAN_S4880
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_TYAN_S4880
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_TYAN_S4880
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S4880
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_TYAN_S4880
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_TYAN_S4880
diff --git a/src/mainboard/tyan/s4880/Makefile.inc b/src/mainboard/tyan/s4880/Makefile.inc
new file mode 100644
index 0000000000..86d71e152b
--- /dev/null
+++ b/src/mainboard/tyan/s4880/Makefile.inc
@@ -0,0 +1,52 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
diff --git a/src/mainboard/tyan/s4882/Kconfig b/src/mainboard/tyan/s4882/Kconfig
new file mode 100644
index 0000000000..af52ebd9a8
--- /dev/null
+++ b/src/mainboard/tyan/s4882/Kconfig
@@ -0,0 +1,105 @@
+config BOARD_TYAN_S4882
+ bool "S4882"
+ select ARCH_X86
+ select CPU_AMD_K8
+ select CPU_AMD_SOCKET_940
+ select NORTHBRIDGE_AMD_AMDK8
+ select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
+ select SOUTHBRIDGE_AMD_AMD8111
+ select SOUTHBRIDGE_AMD_AMD8131
+ select SUPERIO_WINBOND_W83627HF
+ select HAVE_PIRQ_TABLE
+ select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
+ select HAVE_HARD_RESET
+ select IOAPIC
+
+config MAINBOARD_DIR
+ string
+ default tyan/s4882
+ depends on BOARD_TYAN_S4882
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xcf000
+ depends on BOARD_TYAN_S4882
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x01000
+ depends on BOARD_TYAN_S4882
+
+config APIC_ID_OFFSET
+ hex
+ default 0x10
+ depends on BOARD_TYAN_S4882
+
+config K8_REV_F_SUPPORT
+ bool
+ default n
+ depends on BOARD_TYAN_S4882
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_TYAN_S4882
+
+config SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ bool
+ default n
+ depends on BOARD_TYAN_S4882
+
+config LB_CKS_RANGE_END
+ int
+ default 122
+ depends on BOARD_TYAN_S4882
+
+config LB_CKS_LOC
+ int
+ default 123
+ depends on BOARD_TYAN_S4882
+
+config MAINBOARD_PART_NUMBER
+ string
+ default "S4882"
+ depends on BOARD_TYAN_S4882
+
+config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x100000
+ depends on BOARD_TYAN_S4882
+
+config MAX_CPUS
+ int
+ default 4
+ depends on BOARD_TYAN_S4882
+
+config MAX_PHYSICAL_CPUS
+ int
+ default 2
+ depends on BOARD_TYAN_S4882
+
+config HT_CHAIN_END_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_TYAN_S4882
+
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0x0
+ depends on BOARD_TYAN_S4882
+
+config USE_INIT
+ bool
+ default n
+ depends on BOARD_TYAN_S4882
+
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
+ depends on BOARD_TYAN_S4882
+
+config IRQ_SLOT_COUNT
+ int
+ default 11
+ depends on BOARD_TYAN_S4882
diff --git a/src/mainboard/tyan/s4882/Makefile.inc b/src/mainboard/tyan/s4882/Makefile.inc
new file mode 100644
index 0000000000..86d71e152b
--- /dev/null
+++ b/src/mainboard/tyan/s4882/Makefile.inc
@@ -0,0 +1,52 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or
+## modify it under the terms of the GNU General Public License as
+## published by the Free Software Foundation; version 2 of
+## the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+## MA 02110-1301 USA
+##
+
+driver-y += mainboard.o
+
+obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
+obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
+
+# This is part of the conversion to init-obj and away from included code.
+
+initobj-y += crt0.o
+# FIXME in $(top)/Makefile
+crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
+crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
+crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
+crt0-y += ../../../../src/arch/i386/lib/id.inc
+crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
+crt0-y += auto.inc
+
+ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
+ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
+ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
+ldscript-y += ../../../../src/arch/i386/lib/id.lds
+ldscript-y += ../../../../src/arch/i386/lib/failover.lds
+
+ifdef POST_EVALUATION
+
+$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+ perl -e 's/\.rodata/.rom.data/g' -pi $@
+ perl -e 's/\.text/.section .rom.text/g' -pi $@
+
+endif
+
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-15 19:36:03 +0000