diff options
Diffstat (limited to 'src/mainboard')
18 files changed, 45 insertions, 9 deletions
diff --git a/src/mainboard/asrock/g41c-gs/Makefile.inc b/src/mainboard/asrock/g41c-gs/Makefile.inc index 82e72fbb81..ab352cb73d 100644 --- a/src/mainboard/asrock/g41c-gs/Makefile.inc +++ b/src/mainboard/asrock/g41c-gs/Makefile.inc @@ -1,4 +1,7 @@ ramstage-y += cstates.c romstage-y += variants/$(VARIANT_DIR)/gpio.c +bootblock-y += early_init.c +romstage-y += early_init.c + ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/early_init.c index 06e13eb652..c7c7b730a6 100644 --- a/src/mainboard/asrock/g41c-gs/romstage.c +++ b/src/mainboard/asrock/g41c-gs/early_init.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <device/pnp_ops.h> #include <northbridge/intel/x4x/x4x.h> #include <southbridge/intel/i82801gx/i82801gx.h> @@ -27,7 +28,7 @@ #define SERIAL_DEV_R1 PNP_DEV(0x2e, W83627DHG_SP1) #define SUPERIO_DEV PNP_DEV(0x2e, 0) -void mb_lpc_setup(void) +void bootblock_mainboard_early_init(void) { /* Set GPIOs on superio, enable UART */ if (CONFIG(SUPERIO_NUVOTON_NCT6776)) { diff --git a/src/mainboard/asus/p5qc/Makefile.inc b/src/mainboard/asus/p5qc/Makefile.inc index 5c1d211ca7..88c57200d9 100644 --- a/src/mainboard/asus/p5qc/Makefile.inc +++ b/src/mainboard/asus/p5qc/Makefile.inc @@ -13,5 +13,8 @@ CONFIG_GPIO_C:=$(call strip_quotes, $(CONFIG_GPIO_C)) +bootblock-y += early_init.c +romstage-y += early_init.c + ramstage-y += cstates.c romstage-y += $(CONFIG_GPIO_C) diff --git a/src/mainboard/asus/p5qc/romstage.c b/src/mainboard/asus/p5qc/early_init.c index 53aa176b38..cbc84ba101 100644 --- a/src/mainboard/asus/p5qc/romstage.c +++ b/src/mainboard/asus/p5qc/early_init.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <southbridge/intel/i82801jx/i82801jx.h> #include <northbridge/intel/x4x/x4x.h> #include <superio/winbond/w83667hg-a/w83667hg-a.h> @@ -21,7 +22,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83667HG_A_SP1) -void mb_lpc_setup(void) +void bootblock_mainboard_early_init(void) { /* TODO? */ RCBA32(RCBA_CG) = 0xbf7f001f; diff --git a/src/mainboard/asus/p5ql-em/Makefile.inc b/src/mainboard/asus/p5ql-em/Makefile.inc index 641e18f136..ba881b7eeb 100644 --- a/src/mainboard/asus/p5ql-em/Makefile.inc +++ b/src/mainboard/asus/p5ql-em/Makefile.inc @@ -11,6 +11,9 @@ # GNU General Public License for more details. # +bootblock-y += early_init.c + romstage-y += gpio.c +romstage-y += early_init.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/asus/p5ql-em/romstage.c b/src/mainboard/asus/p5ql-em/early_init.c index fa22a645d4..38038012f7 100644 --- a/src/mainboard/asus/p5ql-em/romstage.c +++ b/src/mainboard/asus/p5ql-em/early_init.c @@ -12,6 +12,7 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <device/pnp_ops.h> #include <console/console.h> #include <northbridge/intel/x4x/x4x.h> @@ -24,7 +25,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) #define GPIO_DEV PNP_DEV(0x2e, W83627DHG_GPIO2345_V) -void mb_lpc_setup(void) +void bootblock_mainboard_early_init(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } diff --git a/src/mainboard/asus/p5qpl-am/Makefile.inc b/src/mainboard/asus/p5qpl-am/Makefile.inc index 82e72fbb81..ab352cb73d 100644 --- a/src/mainboard/asus/p5qpl-am/Makefile.inc +++ b/src/mainboard/asus/p5qpl-am/Makefile.inc @@ -1,4 +1,7 @@ ramstage-y += cstates.c romstage-y += variants/$(VARIANT_DIR)/gpio.c +bootblock-y += early_init.c +romstage-y += early_init.c + ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/asus/p5qpl-am/romstage.c b/src/mainboard/asus/p5qpl-am/early_init.c index ad16c0f72a..5987033a09 100644 --- a/src/mainboard/asus/p5qpl-am/romstage.c +++ b/src/mainboard/asus/p5qpl-am/early_init.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <cf9_reset.h> #include <device/pnp_ops.h> #include <console/console.h> @@ -27,7 +28,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) #define GPIO_DEV PNP_DEV(0x2e, W83627DHG_GPIO2345_V) -void mb_lpc_setup(void) +void bootblock_mainboard_early_init(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } diff --git a/src/mainboard/foxconn/g41s-k/Makefile.inc b/src/mainboard/foxconn/g41s-k/Makefile.inc index ca8de4d597..161c623eaa 100644 --- a/src/mainboard/foxconn/g41s-k/Makefile.inc +++ b/src/mainboard/foxconn/g41s-k/Makefile.inc @@ -1,6 +1,9 @@ ramstage-y += cstates.c romstage-y += gpio.c +bootblock-y += early_init.c +romstage-y += early_init.c + ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/ diff --git a/src/mainboard/foxconn/g41s-k/romstage.c b/src/mainboard/foxconn/g41s-k/early_init.c index b4bd77d78b..454b1ea0b0 100644 --- a/src/mainboard/foxconn/g41s-k/romstage.c +++ b/src/mainboard/foxconn/g41s-k/early_init.c @@ -16,6 +16,7 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <northbridge/intel/x4x/x4x.h> #include <southbridge/intel/i82801gx/i82801gx.h> #include <superio/ite/common/ite.h> @@ -24,7 +25,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, IT8720F_SP1) #define GPIO_DEV PNP_DEV(0x2e, IT8720F_GPIO) -void mb_lpc_setup(void) +void bootblock_mainboard_early_init(void) { /* Set up GPIOs on Super I/O. */ ite_reg_write(GPIO_DEV, 0x25, 0x01); diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/Makefile.inc b/src/mainboard/gigabyte/ga-g41m-es2l/Makefile.inc index 0786d6fca5..4100476891 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/Makefile.inc +++ b/src/mainboard/gigabyte/ga-g41m-es2l/Makefile.inc @@ -1,4 +1,7 @@ ramstage-y += cstates.c romstage-y += gpio.c +bootblock-y += early_init.c +romstage-y += early_init.c + ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/early_init.c index bde4f33bef..4540d4e03d 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/early_init.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <device/pci_ops.h> #include <southbridge/intel/i82801gx/i82801gx.h> #include <northbridge/intel/x4x/x4x.h> @@ -29,7 +30,7 @@ * We should use standard gpio.h eventually */ -void mb_lpc_setup(void) +void bootblock_mainboard_early_init(void) { pci_devfn_t dev; diff --git a/src/mainboard/intel/dg41wv/Makefile.inc b/src/mainboard/intel/dg41wv/Makefile.inc index 0786d6fca5..4100476891 100644 --- a/src/mainboard/intel/dg41wv/Makefile.inc +++ b/src/mainboard/intel/dg41wv/Makefile.inc @@ -1,4 +1,7 @@ ramstage-y += cstates.c romstage-y += gpio.c +bootblock-y += early_init.c +romstage-y += early_init.c + ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/intel/dg41wv/romstage.c b/src/mainboard/intel/dg41wv/early_init.c index ff018af5f6..3cb40955d0 100644 --- a/src/mainboard/intel/dg41wv/romstage.c +++ b/src/mainboard/intel/dg41wv/early_init.c @@ -15,6 +15,7 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <device/pnp_ops.h> #include <northbridge/intel/x4x/x4x.h> #include <southbridge/intel/i82801gx/i82801gx.h> @@ -23,7 +24,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) -void mb_lpc_setup(void) +void bootblock_mainboard_early_init(void) { /* Set GPIOs on superio, enable UART */ pnp_enter_ext_func_mode(SERIAL_DEV); diff --git a/src/mainboard/intel/dg43gt/Makefile.inc b/src/mainboard/intel/dg43gt/Makefile.inc index 6b3d94a037..f89d1302e3 100644 --- a/src/mainboard/intel/dg43gt/Makefile.inc +++ b/src/mainboard/intel/dg43gt/Makefile.inc @@ -14,4 +14,7 @@ ramstage-y += cstates.c romstage-y += gpio.c +bootblock-y += early_init.c +romstage-y += early_init.c + ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/early_init.c index 71fd87ad74..8457707ba1 100644 --- a/src/mainboard/intel/dg43gt/romstage.c +++ b/src/mainboard/intel/dg43gt/early_init.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <southbridge/intel/i82801jx/i82801jx.h> #include <northbridge/intel/x4x/x4x.h> #include <superio/winbond/w83627dhg/w83627dhg.h> @@ -21,7 +22,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) -void mb_lpc_setup(void) +void bootblock_mainboard_early_init(void) { RCBA32(0x3410) = 0x00060464; RCBA32(RCBA_BUC) &= ~BUC_LAND; diff --git a/src/mainboard/lenovo/thinkcentre_a58/Makefile.inc b/src/mainboard/lenovo/thinkcentre_a58/Makefile.inc index 0786d6fca5..4100476891 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/Makefile.inc +++ b/src/mainboard/lenovo/thinkcentre_a58/Makefile.inc @@ -1,4 +1,7 @@ ramstage-y += cstates.c romstage-y += gpio.c +bootblock-y += early_init.c +romstage-y += early_init.c + ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/lenovo/thinkcentre_a58/romstage.c b/src/mainboard/lenovo/thinkcentre_a58/early_init.c index 5594cbdda6..a8f6443948 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/romstage.c +++ b/src/mainboard/lenovo/thinkcentre_a58/early_init.c @@ -15,12 +15,13 @@ * GNU General Public License for more details. */ +#include <bootblock_common.h> #include <northbridge/intel/x4x/x4x.h> #include <superio/smsc/smscsuperio/smscsuperio.h> #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) -void mb_lpc_setup(void) +void bootblock_mainboard_early_init(void) { smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } |