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Diffstat (limited to 'src/northbridge/amd/agesa/family10/northbridge.c')
-rw-r--r--src/northbridge/amd/agesa/family10/northbridge.c18
1 files changed, 8 insertions, 10 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 602d473d73..1c7e5474d6 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -914,6 +914,7 @@ static void amdfam10_domain_set_resources(device_t dev)
#endif
unsigned long mmio_basek;
u32 pci_tolm;
+ u64 ramtop = 0;
int i, idx;
struct bus *link;
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
@@ -1036,11 +1037,8 @@ static void amdfam10_domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_GFXUMA
- set_top_of_ram_once(uma_memory_base);
-#else
- set_top_of_ram_once(mmio_basek * 1024);
-#endif
+ if (!ramtop)
+ ramtop = mmio_basek * 1024;
}
basek = mmio_basek;
}
@@ -1057,15 +1055,15 @@ static void amdfam10_domain_set_resources(device_t dev)
idx += 0x10;
printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
-#if CONFIG_GFXUMA
- set_top_of_ram_once(uma_memory_base);
-#else
- set_top_of_ram_once(limitk * 1024);
-#endif
+ if (!ramtop)
+ ramtop = limitk * 1024;
}
#if CONFIG_GFXUMA
+ set_top_of_ram(uma_memory_base);
uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10);
+#else
+ set_top_of_ram(ramtop);
#endif
for(link = dev->link_list; link; link = link->next) {