diff options
Diffstat (limited to 'src/northbridge/amd/agesa/family15/northbridge.c')
| -rw-r--r-- | src/northbridge/amd/agesa/family15/northbridge.c | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 735e126bb9..2ef652d45d 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -36,7 +36,6 @@ #include <Options.h> #include <Topology.h> -#include <northbridge/amd/agesa/agesawrapper.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> #include "sb_cimx.h" @@ -633,23 +632,6 @@ static void domain_read_resources(device_t dev) pci_domain_read_resources(dev); } -static void domain_enable_resources(device_t dev) -{ -#if IS_ENABLED(CONFIG_AGESA_LEGACY_WRAPPER) - /* Must be called after PCI enumeration and resource allocation */ - printk(BIOS_DEBUG, "\nFam15 - %s: AmdInitMid.\n", __func__); - -#if IS_ENABLED(CONFIG_AMD_SB_CIMX) - sb_After_Pci_Init(); -#endif - /* Enable MMIO on AMD CPU Address Map Controller */ - amd_initcpuio(); - - agesawrapper_amdinitmid(); - printk(BIOS_DEBUG, " Fam15 - leaving %s.\n", __func__); -#endif -} - #if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info { unsigned hole_startk; @@ -810,7 +792,6 @@ static void f15_pci_domain_scan_bus(device_t dev) static struct device_operations pci_domain_ops = { .read_resources = domain_read_resources, .set_resources = domain_set_resources, - .enable_resources = domain_enable_resources, .init = DEVICE_NOOP, .scan_bus = f15_pci_domain_scan_bus, .ops_pci_bus = pci_bus_default_ops, |