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Diffstat (limited to 'src/northbridge/amd/agesa/family15/northbridge.c')
-rw-r--r--src/northbridge/amd/agesa/family15/northbridge.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index d1a322ca6c..130086eb91 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -406,7 +406,7 @@ static void create_vga_resource(device_t dev, unsigned nodeid)
* we only deal with the 'first' vga card */
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-#if CONFIG_MULTIPLE_VGA_ADAPTERS == 1
+#if CONFIG_MULTIPLE_VGA_ADAPTERS
extern device_t vga_pri; // the primary vga device, defined in device.c
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);
@@ -540,7 +540,7 @@ static void domain_read_resources(device_t dev)
/* FIXME: do we need to check extend conf space?
I don't believe that much preset value */
-#if CONFIG_PCI_64BIT_PREF_MEM == 0
+#if !CONFIG_PCI_64BIT_PREF_MEM
pci_domain_read_resources(dev);
@@ -626,7 +626,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
}
#endif
-#if CONFIG_GFXUMA == 1
+#if CONFIG_GFXUMA
extern uint64_t uma_memory_base, uma_memory_size;
static void add_uma_resource(struct device *dev, int index)
{
@@ -644,7 +644,7 @@ static void add_uma_resource(struct device *dev, int index)
static void domain_set_resources(device_t dev)
{
-#if CONFIG_PCI_64BIT_PREF_MEM == 1
+#if CONFIG_PCI_64BIT_PREF_MEM
struct resource *io, *mem1, *mem2;
struct resource *res;
#endif
@@ -657,7 +657,7 @@ static void domain_set_resources(device_t dev)
u32 reset_memhole = 1;
#endif
-#if CONFIG_PCI_64BIT_PREF_MEM == 1
+#if CONFIG_PCI_64BIT_PREF_MEM
for (link = dev->link_list; link; link = link->next) {
/* Now reallocate the pci resources memory with the
@@ -773,10 +773,10 @@ static void domain_set_resources(device_t dev)
ram_resource(dev, (idx | i), basek, pre_sizek);
idx += 0x10;
sizek -= pre_sizek;
-#if CONFIG_WRITE_HIGH_TABLES==1
+#if CONFIG_WRITE_HIGH_TABLES
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
-#if CONFIG_GFXUMA == 1
+#if CONFIG_GFXUMA
high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
#else
high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
@@ -798,19 +798,19 @@ static void domain_set_resources(device_t dev)
}
}
-#if CONFIG_GFXUMA == 1
+#if CONFIG_GFXUMA
/* Deduct uma memory before reporting because
* this is what the mtrr code expects */
sizek -= uma_memory_size / 1024;
#endif
ram_resource(dev, (idx | i), basek, sizek);
idx += 0x10;
-#if CONFIG_WRITE_HIGH_TABLES==1
+#if CONFIG_WRITE_HIGH_TABLES
printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
i, mmio_basek, basek, limitk);
if (high_tables_base==0) {
/* Leave some space for ACPI, PIRQ and MP tables */
-#if CONFIG_GFXUMA == 1
+#if CONFIG_GFXUMA
high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
#else
high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
@@ -820,7 +820,7 @@ static void domain_set_resources(device_t dev)
#endif
}
-#if CONFIG_GFXUMA == 1
+#if CONFIG_GFXUMA
add_uma_resource(dev, 7);
#endif
@@ -1022,7 +1022,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max)
* otherwise the device under it will not be scanned
*/
int linknum;
-#if CONFIG_HT3_SUPPORT==1
+#if CONFIG_HT3_SUPPORT
linknum = 8;
#else
linknum = 4;