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Diffstat (limited to 'src/northbridge/amd/agesa/family16kb/northbridge.c')
-rw-r--r--src/northbridge/amd/agesa/family16kb/northbridge.c19
1 files changed, 0 insertions, 19 deletions
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index 557c9c4bbd..98ed2b8913 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -36,7 +36,6 @@
#include <Options.h>
#include <Topology.h>
-#include <northbridge/amd/agesa/agesawrapper.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <northbridge/amd/agesa/agesa_helper.h>
@@ -644,23 +643,6 @@ static void domain_read_resources(device_t dev)
pci_domain_read_resources(dev);
}
-static void domain_enable_resources(device_t dev)
-{
-#if IS_ENABLED(CONFIG_AGESA_LEGACY_WRAPPER)
- if (acpi_is_wakeup_s3())
- agesawrapper_fchs3laterestore();
-
- /* Must be called after PCI enumeration and resource allocation */
- if (!acpi_is_wakeup_s3()) {
- /* Enable MMIO on AMD CPU Address Map Controller */
- amd_initcpuio();
-
- agesawrapper_amdinitmid();
- }
- printk(BIOS_DEBUG, " ader - leaving domain_enable_resources.\n");
-#endif
-}
-
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
struct hw_mem_hole_info {
unsigned hole_startk;
@@ -816,7 +798,6 @@ static void domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = domain_read_resources,
.set_resources = domain_set_resources,
- .enable_resources = domain_enable_resources,
.init = DEVICE_NOOP,
.scan_bus = pci_domain_scan_bus,
.ops_pci_bus = pci_bus_default_ops,