summaryrefslogtreecommitdiff
path: root/src/northbridge/amd/agesa
diff options
context:
space:
mode:
Diffstat (limited to 'src/northbridge/amd/agesa')
-rw-r--r--src/northbridge/amd/agesa/family15tn/Makefile.inc3
-rw-r--r--src/northbridge/amd/agesa/family15tn/chip.h28
-rw-r--r--src/northbridge/amd/agesa/family15tn/dimmSpd.c160
-rw-r--r--src/northbridge/amd/agesa/family15tn/dimmSpd.h56
-rw-r--r--src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c8
-rw-r--r--src/northbridge/amd/agesa/family15tn/fam15tn_callouts.h1
6 files changed, 255 insertions, 1 deletions
diff --git a/src/northbridge/amd/agesa/family15tn/Makefile.inc b/src/northbridge/amd/agesa/family15tn/Makefile.inc
index b0cf7ff2d6..5bc7f6cf53 100644
--- a/src/northbridge/amd/agesa/family15tn/Makefile.inc
+++ b/src/northbridge/amd/agesa/family15tn/Makefile.inc
@@ -18,7 +18,8 @@
#
romstage-y += fam15tn_callouts.c
+romstage-y += dimmSpd.c
ramstage-y += northbridge.c
ramstage-y += fam15tn_callouts.c
-
+ramstage-y += dimmSpd.c
diff --git a/src/northbridge/amd/agesa/family15tn/chip.h b/src/northbridge/amd/agesa/family15tn/chip.h
new file mode 100644
index 0000000000..013d648f51
--- /dev/null
+++ b/src/northbridge/amd/agesa/family15tn/chip.h
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Sage Electronic Engineering, LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef _AGESA_FAM15TN_CHIP_H_
+#define _AGESA_FAM15TN_CHIP_H_
+
+struct northbridge_amd_agesa_family15tn_config
+{
+ u8 spdAddrLookup[2][2][4];
+};
+
+#endif
diff --git a/src/northbridge/amd/agesa/family15tn/dimmSpd.c b/src/northbridge/amd/agesa/family15tn/dimmSpd.c
new file mode 100644
index 0000000000..8b62a39069
--- /dev/null
+++ b/src/northbridge/amd/agesa/family15tn/dimmSpd.c
@@ -0,0 +1,160 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <device/pci_def.h>
+#include <device/device.h>
+
+/* warning: Porting.h includes an open #pragma pack(1) */
+#include "Porting.h"
+#include "AGESA.h"
+#include "amdlib.h"
+#include "dimmSpd.h"
+#include "chip.h"
+
+
+#define DIMENSION(array)(sizeof (array)/ sizeof (array [0]))
+
+/*-----------------------------------------------------------------------------
+ *
+ * readSmbusByteData - read a single SPD byte from any offset
+ */
+
+static int readSmbusByteData (int iobase, int address, char *buffer, int offset)
+{
+ unsigned int status;
+ UINT64 limit;
+
+ address |= 1; // set read bit
+
+ __outbyte (iobase + 0, 0xFF); // clear error status
+ __outbyte (iobase + 1, 0x1F); // clear error status
+ __outbyte (iobase + 3, offset); // offset in eeprom
+ __outbyte (iobase + 4, address); // slave address and read bit
+ __outbyte (iobase + 2, 0x48); // read byte command
+
+ // time limit to avoid hanging for unexpected error status (should never happen)
+ limit = __rdtsc () + 2000000000 / 10;
+ for (;;)
+ {
+ status = __inbyte (iobase);
+ if (__rdtsc () > limit) break;
+ if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
+ if ((status & 1) == 1) continue; // HostBusy set, keep waiting
+ break;
+ }
+
+ buffer [0] = __inbyte (iobase + 5);
+ if (status == 2) status = 0; // check for done with no errors
+ return status;
+}
+
+/*-----------------------------------------------------------------------------
+ *
+ * readSmbusByte - read a single SPD byte from the default offset
+ * this function is faster function readSmbusByteData
+ */
+
+static int readSmbusByte (int iobase, int address, char *buffer)
+{
+ unsigned int status;
+ UINT64 limit;
+
+ __outbyte (iobase + 0, 0xFF); // clear error status
+ __outbyte (iobase + 2, 0x44); // read command
+
+ // time limit to avoid hanging for unexpected error status
+ limit = __rdtsc () + 2000000000 / 10;
+ for (;;)
+ {
+ status = __inbyte (iobase);
+ if (__rdtsc () > limit) break;
+ if ((status & 2) == 0) continue; // SMBusInterrupt not set, keep waiting
+ if ((status & 1) == 1) continue; // HostBusy set, keep waiting
+ break;
+ }
+
+ buffer [0] = __inbyte (iobase + 5);
+ if (status == 2) status = 0; // check for done with no errors
+ return status;
+}
+
+/*---------------------------------------------------------------------------
+ *
+ * readspd - Read one or more SPD bytes from a DIMM.
+ * Start with offset zero and read sequentially.
+ * Optimization relies on autoincrement to avoid
+ * sending offset for every byte.
+ * Reads 128 bytes in 7-8 ms at 400 KHz.
+ */
+
+static int readspd (int iobase, int SmbusSlaveAddress, char *buffer, int count)
+{
+ int index, error;
+
+ /* read the first byte using offset zero */
+ error = readSmbusByteData (iobase, SmbusSlaveAddress, buffer, 0);
+ if (error) return error;
+
+ /* read the remaining bytes using auto-increment for speed */
+ for (index = 1; index < count; index++)
+ {
+ error = readSmbusByte (iobase, SmbusSlaveAddress, &buffer [index]);
+ if (error) return error;
+ }
+
+ return 0;
+}
+
+static void writePmReg (int reg, int data)
+{
+ __outbyte (0xCD6, reg);
+ __outbyte (0xCD7, data);
+}
+
+static void setupFch (int ioBase)
+{
+ writePmReg (0x2D, ioBase >> 8);
+ writePmReg (0x2C, ioBase | 1);
+ __outbyte (ioBase + 0x0E, 66000000 / 400000 / 4); // set SMBus clock to 400 KHz
+}
+
+AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
+{
+ int spdAddress, ioBase;
+ ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
+ ROMSTAGE_CONST struct northbridge_amd_agesa_family15tn_config *config = dev->chip_info;
+
+ if ((dev == 0) || (config == 0))
+ return AGESA_ERROR;
+
+ if (info->SocketId >= DIMENSION(config->spdAddrLookup ))
+ return AGESA_ERROR;
+ if (info->MemChannelId >= DIMENSION(config->spdAddrLookup[0] ))
+ return AGESA_ERROR;
+ if (info->DimmId >= DIMENSION(config->spdAddrLookup[0][0]))
+ return AGESA_ERROR;
+
+ spdAddress = config->spdAddrLookup
+ [info->SocketId] [info->MemChannelId] [info->DimmId];
+
+ if (spdAddress == 0) return AGESA_ERROR;
+ ioBase = 0xB00;
+ setupFch (ioBase);
+ return readspd (ioBase, spdAddress, (void *) info->Buffer, 128);
+}
diff --git a/src/northbridge/amd/agesa/family15tn/dimmSpd.h b/src/northbridge/amd/agesa/family15tn/dimmSpd.h
new file mode 100644
index 0000000000..116eeb04fc
--- /dev/null
+++ b/src/northbridge/amd/agesa/family15tn/dimmSpd.h
@@ -0,0 +1,56 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*----------------------------------------------------------------------------------------
+ * M O D U L E S U S E D
+ *----------------------------------------------------------------------------------------
+ */
+
+#ifndef _DIMMSPD_H_
+#define _DIMMSPD_H_
+
+/*----------------------------------------------------------------------------------------
+ * D E F I N I T I O N S A N D M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------
+ * T Y P E D E F S A N D S T R U C T U R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------
+ * P R O T O T Y P E S O F L O C A L F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------
+ * E X P O R T E D F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+AGESA_STATUS
+AmdMemoryReadSPD (IN UINT32 Func, IN UINT32 Data, IN OUT AGESA_READ_SPD_PARAMS *SpdData);
+
+/*---------------------------------------------------------------------------------------
+ * L O C A L F U N C T I O N S
+ *---------------------------------------------------------------------------------------
+ */
+
+#endif
diff --git a/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c b/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
index 8c5605c041..bd307b1cf8 100644
--- a/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
+++ b/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.c
@@ -24,6 +24,7 @@
#include "heapManager.h"
#include "FchPlatform.h"
#include "cbfs.h"
+#include "dimmSpd.h"
#include "fam15tn_callouts.h"
AGESA_STATUS fam15tn_AllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
@@ -405,3 +406,10 @@ AGESA_STATUS fam15tn_HookGfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *Con
return pVbiosImageInfo->ImagePtr == NULL ? AGESA_WARNING : AGESA_SUCCESS;
}
+AGESA_STATUS fam15tn_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
+{
+ AGESA_STATUS Status;
+ Status = AmdMemoryReadSPD (Func, Data, ConfigPtr);
+
+ return Status;
+}
diff --git a/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.h b/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.h
index 74c7bf3561..eb80a6396d 100644
--- a/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.h
+++ b/src/northbridge/amd/agesa/family15tn/fam15tn_callouts.h
@@ -49,5 +49,6 @@ AGESA_STATUS fam15tn_HookBeforeDQSTraining (UINT32 Func, UINT32 Data, VOID *Conf
AGESA_STATUS fam15tn_HookBeforeExitSelfRefresh (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS fam15tn_DefaultRet (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS fam15tn_HookGfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *ConfigPrt);
+AGESA_STATUS fam15tn_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
#endif /* CALLOUTS_AMD_AGESA_FAM15TN_H */
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-30 21:01:51 +0000