diff options
Diffstat (limited to 'src/northbridge/amd/amdht')
| -rw-r--r-- | src/northbridge/amd/amdht/h3finit.c | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/amdht/h3ncmn.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c index 55da604551..764d2988b4 100644 --- a/src/northbridge/amd/amdht/h3finit.c +++ b/src/northbridge/amd/amdht/h3finit.c @@ -1518,7 +1518,7 @@ static void hammerSublinkFixup(sMainData *pDat) { if ((loFreq != 5) && /* { 9, 5} 1600MHz / 800MHz 2:1 */ (loFreq != 2) && /* { 9, 2} 1600MHz / 400MHz 4:1 */ - (loFreq != 0) ) /* { 9, 0} 1600MHz / 200Mhz 8:1 */ + (loFreq != 0) ) /* { 9, 0} 1600MHz / 200MHz 8:1 */ downgrade = TRUE; } else if (hiFreq == 7) diff --git a/src/northbridge/amd/amdht/h3ncmn.c b/src/northbridge/amd/amdht/h3ncmn.c index 830ed1cc22..e83f872bc0 100644 --- a/src/northbridge/amd/amdht/h3ncmn.c +++ b/src/northbridge/amd/amdht/h3ncmn.c @@ -1384,7 +1384,7 @@ static void setLinkData(sMainData *pDat, cNorthBridge *nb) ASSERT((temp >= HT_FREQUENCY_600M && temp <= HT_FREQUENCY_2600M) || (temp == HT_FREQUENCY_200M) || (temp == HT_FREQUENCY_400M)); AmdPCIWriteBits(linkBase + HTHOST_FREQ_REV_REG, 11, 8, &temp); - if (temp > HT_FREQUENCY_1000M) /* Gen1 = 200Mhz -> 1000MHz, Gen3 = 1200MHz -> 2600MHz */ + if (temp > HT_FREQUENCY_1000M) /* Gen1 = 200MHz -> 1000MHz, Gen3 = 1200MHz -> 2600MHz */ { /* Enable for Gen3 frequencies */ temp = 1; @@ -1420,7 +1420,7 @@ static void setLinkData(sMainData *pDat, cNorthBridge *nb) /* Handle additional HT3 frequency requirements, if needed, * or clear them if switching down to ht1 on a warm reset. - * Gen1 = 200Mhz -> 1000MHz, Gen3 = 1200MHz -> 2600MHz + * Gen1 = 200MHz -> 1000MHz, Gen3 = 1200MHz -> 2600MHz * * Even though we assert if debugging, we need to check that the capability was found * always, since this is an unknown hardware device, also we are taking |