diff options
Diffstat (limited to 'src/northbridge/amd/amdk8/reset_test.c')
| -rw-r--r-- | src/northbridge/amd/amdk8/reset_test.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdk8/reset_test.c b/src/northbridge/amd/amdk8/reset_test.c new file mode 100644 index 0000000000..949bd7cc15 --- /dev/null +++ b/src/northbridge/amd/amdk8/reset_test.c @@ -0,0 +1,43 @@ +#include <stdint.h> +#define NODE_ID 0x60 +#define HT_INIT_CONTROL 0x6c + +#define HTIC_ColdR_Detect (1<<4) +#define HTIC_BIOSR_Detect (1<<5) +#define HTIC_INIT_Detect (1<<6) + + +static int cpu_init_detected(void) +{ + unsigned long dcl; + int cpu_init; + + unsigned long htic; + + htic = pci_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); +#if 0 + print_debug("htic: "); + print_debug_hex32(htic); + print_debug("\r\n"); + + if (!(htic & HTIC_ColdR_Detect)) { + print_debug("Cold Reset.\r\n"); + } + if ((htic & HTIC_ColdR_Detect) && !(htic & HTIC_BIOSR_Detect)) { + print_debug("BIOS generated Reset.\r\n"); + } + if (htic & HTIC_INIT_Detect) { + print_debug("Init event.\r\n"); + } +#endif + cpu_init = (htic & HTIC_INIT_Detect); + return cpu_init; +} + +static void distinguish_cpu_resets(void) +{ + uint32_t htic; + htic = pci_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic |= HTIC_ColdR_Detect | HTIC_BIOSR_Detect | HTIC_INIT_Detect; + pci_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); +} |