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Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3')
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mct_d.c4
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index 0c37366845..08d8d43ff3 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@ -2398,10 +2398,10 @@ static void precise_ndelay_fam15(struct MCTStatStruc *pMCTstat, uint32_t nanosec
tsc_msr = rdmsr(0x00000010);
start_timestamp = (((uint64_t)tsc_msr.hi) << 32) | tsc_msr.lo;
- do {
+ do {
tsc_msr = rdmsr(0x00000010);
current_timestamp = (((uint64_t)tsc_msr.hi) << 32) | tsc_msr.lo;
- } while ((current_timestamp - start_timestamp) < cycle_count);
+ } while ((current_timestamp - start_timestamp) < cycle_count);
}
static void precise_memclk_delay_fam15(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, uint8_t dct, uint32_t clocks) {
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
index 324e35e980..802417971f 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
@@ -930,7 +930,7 @@ static void dqsTrainRcvrEn_SW_Fam10(struct MCTStatStruc *pMCTstat,
*/
for (lane = 0; lane < 8; lane++) {
if (trained[lane]) {
- pDCTstat->CH_D_B_RCVRDLY[Channel][Receiver >> 1][lane] = current_total_delay[lane];
+ pDCTstat->CH_D_B_RCVRDLY[Channel][Receiver >> 1][lane] = current_total_delay[lane];
} else {
printk(BIOS_WARNING, "TrainRcvrEn: WARNING: Lane %d of receiver %d on channel %d failed training!\n", lane, Receiver, Channel);