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-rw-r--r--src/northbridge/amd/amdfam10/Makefile.inc5
-rw-r--r--src/northbridge/amd/amdfam10/acpi.c87
2 files changed, 0 insertions, 92 deletions
diff --git a/src/northbridge/amd/amdfam10/Makefile.inc b/src/northbridge/amd/amdfam10/Makefile.inc
index bae7c187ac..b2e81436fb 100644
--- a/src/northbridge/amd/amdfam10/Makefile.inc
+++ b/src/northbridge/amd/amdfam10/Makefile.inc
@@ -3,11 +3,6 @@ ramstage-y += misc_control.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += ssdt.asl
-ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr1.asl
-ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr2.asl
-ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr3.asl
-ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr4.asl
-ramstage-$(CONFIG_HAVE_ACPI_TABLES) += sspr5.asl
ramstage-y += get_pci1234.c
diff --git a/src/northbridge/amd/amdfam10/acpi.c b/src/northbridge/amd/amdfam10/acpi.c
index abba0ce817..513fa58f7e 100644
--- a/src/northbridge/amd/amdfam10/acpi.c
+++ b/src/northbridge/amd/amdfam10/acpi.c
@@ -290,90 +290,3 @@ void update_ssdtx(void *ssdtx, int i)
}
-static void update_sspr(void *sspr, u32 nodeid, u32 cpuindex)
-{
- u8 *CPU;
- u8 *CPUIN;
- u8 *COREFREQ;
- u8 *POWER;
- u8 *TRANSITION_LAT;
- u8 *BUSMASTER_LAT;
- u8 *CONTROL;
- u8 *STATUS;
- unsigned offset = 0x94 - 0x7f;
- int i;
-
- CPU = sspr + 0x38;
- CPUIN = sspr + 0x3a;
-
- COREFREQ = sspr + 0x7f; //2 byte
- POWER = sspr + 0x82; //3 bytes
- TRANSITION_LAT = sspr + 0x87; //two bytes
- BUSMASTER_LAT = sspr + 0x8a; //two bytes
- CONTROL = sspr + 0x8d;
- STATUS = sspr + 0x8f;
-
- snprintf((char*)CPU, 3, "%02x", (char)cpuindex);
- *CPUIN = (u8) cpuindex;
-
- for(i=0;i<sysconf.p_state_num;i++) {
- struct p_state_t *p_state = &sysconf.p_state[nodeid * 5 + i];
- intx_to_stream(p_state->corefreq, 2, COREFREQ + i*offset);
- intx_to_stream(p_state->power, 3, POWER + i*offset);
- intx_to_stream(p_state->transition_lat, 2, TRANSITION_LAT + i*offset);
- intx_to_stream(p_state->busmaster_lat, 2, BUSMASTER_LAT + i*offset);
- *((u8 *)(CONTROL + i*offset)) =(u8) p_state->control;
- *((u8 *)(STATUS + i*offset)) =(u8) p_state->status;
- }
-}
-
-extern const unsigned char AmlCode_sspr5[];
-extern const unsigned char AmlCode_sspr4[];
-extern const unsigned char AmlCode_sspr3[];
-extern const unsigned char AmlCode_sspr2[];
-extern const unsigned char AmlCode_sspr1[];
-
-/* fixme: find one good way for different p_state_num */
-unsigned long acpi_add_ssdt_pstates(acpi_rsdp_t *rsdp, unsigned long current)
-{
- device_t cpu;
- int cpu_index = 0;
-
- acpi_header_t *ssdt;
-
- if(!sysconf.p_state_num) return current;
-
- void *AmlCode_sspr;
- switch(sysconf.p_state_num) {
- case 1: AmlCode_sspr = &AmlCode_sspr1; break;
- case 2: AmlCode_sspr = &AmlCode_sspr2; break;
- case 3: AmlCode_sspr = &AmlCode_sspr3; break;
- case 4: AmlCode_sspr = &AmlCode_sspr4; break;
- default: AmlCode_sspr = &AmlCode_sspr5; break;
- }
-
- for(cpu = all_devices; cpu; cpu = cpu->next) {
- if ((cpu->path.type != DEVICE_PATH_APIC) ||
- (cpu->bus->dev->path.type != DEVICE_PATH_CPU_CLUSTER)) {
- continue;
- }
- if (!cpu->enabled) {
- continue;
- }
- printk(BIOS_DEBUG, "ACPI: pstate cpu_index=%02x, node_id=%02x, core_id=%02x\n", cpu_index, cpu->path.apic.node_id, cpu->path.apic.core_id);
-
- current = ALIGN(current, 16);
- ssdt = (acpi_header_t *)current;
- memcpy(ssdt, AmlCode_sspr, sizeof(acpi_header_t));
- current += ssdt->length;
- memcpy(ssdt, AmlCode_sspr, ssdt->length);
- update_sspr((void*)ssdt,cpu->path.apic.node_id, cpu_index);
- /* recalculate checksum */
- ssdt->checksum = 0;
- ssdt->checksum = acpi_checksum((unsigned char *)ssdt,ssdt->length);
- acpi_add_table(rsdp, ssdt);
-
- cpu_index++;
- }
- return current;
-}