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-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mct_d.c11
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mct_d.h1
2 files changed, 9 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index 0b8833124e..f31fb3c7e6 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@ -336,9 +336,8 @@ uint8_t is_ecc_enabled(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTs
{
uint8_t ecc_enabled = 1;
- if (!mctGet_NVbits(NV_ECC_CAP) || !mctGet_NVbits(NV_ECC)) {
- return 0;
- }
+ if (!pMCTstat->try_ecc)
+ ecc_enabled = 0;
if (pDCTstat->NodePresent && pDCTstat->DIMMValid) {
if (!(pDCTstat->Status & (1 << SB_ECCDIMMs))) {
@@ -2659,6 +2658,12 @@ static void mctAutoInitMCT_D(struct MCTStatStruc *pMCTstat,
uint8_t s3resume = acpi_is_wakeup_s3();
restartinit:
+
+ if (!mctGet_NVbits(NV_ECC_CAP) || !mctGet_NVbits(NV_ECC))
+ pMCTstat->try_ecc = 0;
+ else
+ pMCTstat->try_ecc = 1;
+
mctInitMemGPIOs_A_D(); /* Set any required GPIOs*/
if (s3resume) {
printk(BIOS_DEBUG, "mctAutoInitMCT_D: mct_ForceNBPState0_En_Fam15\n");
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h
index 67eb2b4869..a3a94393ad 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h
@@ -300,6 +300,7 @@ struct MCTStatStruc {
u32 SysLimit; /* LIMIT[39:8] (system address)*/
uint32_t TSCFreq;
uint16_t nvram_checksum;
+ uint8_t try_ecc;
} __attribute__((packed));
/*=============================================================================