diff options
Diffstat (limited to 'src/northbridge/ibm')
| -rw-r--r-- | src/northbridge/ibm/cpc710/cpc710_pci.c | 4 | ||||
| -rw-r--r-- | src/northbridge/ibm/cpc710/cpc710_pci.h | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/ibm/cpc710/cpc710_pci.c b/src/northbridge/ibm/cpc710/cpc710_pci.c index 233e119baf..2b6024e5b9 100644 --- a/src/northbridge/ibm/cpc710/cpc710_pci.c +++ b/src/northbridge/ibm/cpc710/cpc710_pci.c @@ -45,7 +45,7 @@ cpc710_pci_init(void) setCPC710_PCI32(CPC710_PCIL0_MSIZE, CPC710_PCI32_MEM_SIZE); setCPC710_PCI32(CPC710_PCIL0_IOSIZE, CPC710_PCI32_IO_SIZE); setCPC710_PCI32(CPC710_PCIL0_SMBAR, CPC710_PCI32_MEM_BASE); - setCPC710_PCI32(CPC710_PCIL0_SIBAR, CPC710_PCI32_IO_BASE); + setCPC710_PCI32(CPC710_PCIL0_SIBAR, CPC710_PCI32CONFIG_IO_BASE); setCPC710_PCI32(CPC710_PCIL0_CTLRW, 0x00000000); setCPC710_PCI32(CPC710_PCIL0_PSSIZE, 0x00000080); setCPC710_PCI32(CPC710_PCIL0_BARPS, 0x00000000); @@ -94,7 +94,7 @@ cpc710_pci_init(void) setCPC710_PCI64(CPC710_PCIL0_MSIZE, CPC710_PCI64_MEM_SIZE); setCPC710_PCI64(CPC710_PCIL0_IOSIZE, CPC710_PCI64_IO_SIZE); setCPC710_PCI64(CPC710_PCIL0_SMBAR, CPC710_PCI64_MEM_BASE); - setCPC710_PCI64(CPC710_PCIL0_SIBAR, CPC710_PCI64_IO_BASE); + setCPC710_PCI64(CPC710_PCIL0_SIBAR, CPC710_PCI64CONFIG_IO_BASE); setCPC710_PCI64(CPC710_PCIL0_CTLRW, 0x02000000); setCPC710_PCI64(CPC710_PCIL0_PSSIZE, 0x00000080); diff --git a/src/northbridge/ibm/cpc710/cpc710_pci.h b/src/northbridge/ibm/cpc710/cpc710_pci.h index 51aaa22049..0b3374ebd4 100644 --- a/src/northbridge/ibm/cpc710/cpc710_pci.h +++ b/src/northbridge/ibm/cpc710/cpc710_pci.h @@ -24,17 +24,17 @@ #ifndef _CPC710_PCI_H_ #define _CPC710_PCI_H_ -#define CPC710_PCI32_CONFIG (PCIC0_CFGADDR & 0xfff00000) +#define CPC710_PCI32_CONFIG (CONFIG_PCIC0_CFGADDR & 0xfff00000) #define CPC710_PCI32_MEM_SIZE 0xf8000000 #define CPC710_PCI32_MEM_BASE 0xc0000000 #define CPC710_PCI32_IO_SIZE 0xf8000000 -#define CPC710_PCI32_IO_BASE 0x80000000 +#define CPC710_PCI32CONFIG_IO_BASE 0x80000000 //#define CPC710_PCI64_CONFIG 0xff400000 //#define CPC710_PCI64_MEM_SIZE 0xf8000000 //#define CPC710_PCI64_MEM_BASE 0xc8000000 //#define CPC710_PCI64_IO_SIZE 0xf8000000 -//#define CPC710_PCI64_IO_BASE 0x88000000 +//#define CPC710_PCI64CONFIG_IO_BASE 0x88000000 #define CPC710_PCIL0_PSEA 0xf6110 #define CPC710_PCIL0_PCIDG 0xf6120 |