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-rw-r--r--src/northbridge/intel/e7505/northbridge.c2
-rw-r--r--src/northbridge/intel/e7505/raminit.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index 71b19f6cf2..f6e14d67f7 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -92,7 +92,7 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
- set_top_of_ram(tolmk * 1024);
+ set_late_cbmem_top(tolmk * 1024);
}
assign_resources(dev->link_list);
}
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 9adbca1a30..975a373433 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -1892,10 +1892,10 @@ void e7505_mch_init(const struct mem_controller *memctrl)
sdram_enable(memctrl);
}
-unsigned long get_top_of_ram(void)
+uintptr_t restore_top_of_low_cacheable(void)
{
u32 tolm = (pci_read_config16(MCHDEV, TOLM) & ~0x7ff) << 16;
- return (unsigned long) tolm;
+ return tolm;
}
/**