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-rw-r--r--src/northbridge/intel/fsp_rangeley/Makefile.inc34
1 files changed, 0 insertions, 34 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/Makefile.inc b/src/northbridge/intel/fsp_rangeley/Makefile.inc
deleted file mode 100644
index f02e3c4aec..0000000000
--- a/src/northbridge/intel/fsp_rangeley/Makefile.inc
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2010 Google Inc.
-# Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-ifeq ($(CONFIG_NORTHBRIDGE_INTEL_FSP_RANGELEY),y)
-
-subdirs-y += fsp
-ramstage-y += northbridge.c
-
-ramstage-y += acpi.c
-ramstage-y += port_access.c
-
-romstage-y += memmap.c
-romstage-y += ../../../arch/x86/walkcbfs.S
-romstage-y += port_access.c
-
-CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)
-
-CPPFLAGS_common += -I$(src)/northbridge/intel/fsp_rangeley/
-CPPFLAGS_common += -I$(src)/northbridge/intel/fsp_rangeley/fsp
-
-endif