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path: root/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
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Diffstat (limited to 'src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c')
-rw-r--r--src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
index eb316555fb..24fdc7497b 100644
--- a/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
+++ b/src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
@@ -18,11 +18,11 @@
#include <console/console.h>
#include <bootstate.h>
#include <cbmem.h>
+#include <cf9_reset.h>
#include <device/device.h>
#include <southbridge_pci_devs.h>
#include <fsp_util.h>
#include "../chip.h"
-#include <reset.h>
#ifdef __PRE_RAM__
@@ -97,7 +97,7 @@ void ChipsetFspReturnPoint(EFI_STATUS Status,
{
*(void **)CBMEM_FSP_HOB_PTR = HobListPtr;
if (Status == 0xFFFFFFFF) {
- hard_reset();
+ system_reset();
}
romstage_main_continue(Status, HobListPtr);
}