diff options
Diffstat (limited to 'src/northbridge/intel/fsp_sandybridge/northbridge.c')
| -rw-r--r-- | src/northbridge/intel/fsp_sandybridge/northbridge.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/northbridge/intel/fsp_sandybridge/northbridge.c b/src/northbridge/intel/fsp_sandybridge/northbridge.c index adc69bcd89..fac635df10 100644 --- a/src/northbridge/intel/fsp_sandybridge/northbridge.c +++ b/src/northbridge/intel/fsp_sandybridge/northbridge.c @@ -245,16 +245,6 @@ static void pci_domain_set_resources(device_t dev) assign_resources(dev->link_list); } -unsigned long get_top_of_ram(void) -{ - struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0)); - - /* Base of TSEG is top of usable DRAM */ - u32 tom = pci_read_config32(dev, TSEG) & ~(1UL << 0); - tom -= 0x200000; /* 2MB for FSP HOB */ - return (unsigned long) tom; -} - /* TODO We could determine how many PCIe busses we need in * the bar. For now that number is hardcoded to a max of 64. * See e7525/northbridge.c for an example. |