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Diffstat (limited to 'src/northbridge/intel/haswell/raminit.h')
-rw-r--r--src/northbridge/intel/haswell/raminit.h37
1 files changed, 33 insertions, 4 deletions
diff --git a/src/northbridge/intel/haswell/raminit.h b/src/northbridge/intel/haswell/raminit.h
index 400ac2d4ce..c0f6c639d3 100644
--- a/src/northbridge/intel/haswell/raminit.h
+++ b/src/northbridge/intel/haswell/raminit.h
@@ -3,8 +3,7 @@
#ifndef RAMINIT_H
#define RAMINIT_H
-#include <stdint.h>
-#include "pei_data.h"
+#include <types.h>
#define SPD_MEMORY_DOWN 0xff
@@ -21,9 +20,39 @@ struct spd_info {
#define MAX_USB3_PORTS 6
#endif
+/* There are 8 OC pins */
+#define USB_OC_PIN_SKIP 8
+
+enum usb2_port_location {
+ USB_PORT_SKIP = 0,
+ USB_PORT_BACK_PANEL,
+ USB_PORT_FRONT_PANEL,
+ USB_PORT_DOCK,
+ USB_PORT_MINI_PCIE,
+ USB_PORT_FLEX,
+ USB_PORT_INTERNAL,
+};
+
+/*
+ * USB port length is in MRC format: binary-coded decimal length in tenths of an inch.
+ * 4.2 inches -> 0x0042
+ * 12.7 inches -> 0x0127
+ */
+struct usb2_port_config {
+ uint16_t length;
+ bool enable;
+ unsigned short oc_pin;
+ enum usb2_port_location location;
+};
+
+struct usb3_port_config {
+ bool enable;
+ unsigned int oc_pin;
+};
+
/* Mainboard-specific USB configuration */
-extern const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS];
-extern const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS];
+extern const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS];
+extern const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS];
/* Mainboard callback to fill in the SPD addresses */
void mb_get_spd_map(struct spd_info *spdi);