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-rw-r--r--src/northbridge/intel/haswell/Kconfig1
-rw-r--r--src/northbridge/intel/haswell/acpi.c10
-rw-r--r--src/northbridge/intel/haswell/haswell.h2
-rw-r--r--src/northbridge/intel/haswell/northbridge.c1
4 files changed, 14 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
index 44ee71877d..cac5c46431 100644
--- a/src/northbridge/intel/haswell/Kconfig
+++ b/src/northbridge/intel/haswell/Kconfig
@@ -26,6 +26,7 @@ config NORTHBRIDGE_INTEL_HASWELL
select MMCONF_SUPPORT_DEFAULT
select INTEL_DDI
select INTEL_DP
+ select PER_DEVICE_ACPI_TABLES
if NORTHBRIDGE_INTEL_HASWELL
diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index b2fab11e58..7862f024a7 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -30,6 +30,9 @@
#include <device/pci_ids.h>
#include <build.h>
#include "haswell.h"
+#include <cbmem.h>
+#include <arch/acpigen.h>
+#include <cpu/cpu.h>
unsigned long acpi_fill_mcfg(unsigned long current)
{
@@ -191,3 +194,10 @@ int init_igd_opregion(igd_opregion_t *opregion)
return 0;
}
+
+unsigned long northbridge_acpi_fill_ssdt_generator(unsigned long current,
+ const char *oem_table_id)
+{
+ generate_cpu_entries();
+ return (unsigned long) (acpigen_get_current());
+}
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index 55f6f284e4..0086dd0c0b 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -229,6 +229,8 @@ struct mrc_data_container *find_current_mrc_cache(void);
#if !defined(__PRE_RAM__)
#include "gma.h"
int init_igd_opregion(igd_opregion_t *igd_opregion);
+unsigned long northbridge_acpi_fill_ssdt_generator(unsigned long current,
+ const char *oem_table_id);
#endif
#endif
diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index 010cc07104..eaac723238 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -463,6 +463,7 @@ static struct device_operations mc_ops = {
.enable_resources = pci_dev_enable_resources,
.init = northbridge_init,
.enable = northbridge_enable,
+ .acpi_fill_ssdt_generator = northbridge_acpi_fill_ssdt_generator,
.scan_bus = 0,
.ops_pci = &intel_pci_ops,
};