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-rw-r--r--src/northbridge/intel/haswell/haswell.h3
-rw-r--r--src/northbridge/intel/haswell/pei_data.h8
2 files changed, 7 insertions, 4 deletions
diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index 00616afb49..2d03a68da1 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -186,13 +186,14 @@
#define DMIDRCCFG 0xeb4 /* 32bit */
#ifndef __ASSEMBLER__
+#include <compiler.h>
static inline void barrier(void) { asm("" ::: "memory"); }
struct ied_header {
char signature[10];
u32 size;
u8 reserved[34];
-} __attribute__ ((packed));
+} __packed;
#define PCI_DEVICE_ID_HSW_MOBILE 0x0c04
#define PCI_DEVICE_ID_HSW_ULT 0x0a04
diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h
index f92c0a68e0..f4023e0a6b 100644
--- a/src/northbridge/intel/haswell/pei_data.h
+++ b/src/northbridge/intel/haswell/pei_data.h
@@ -30,6 +30,8 @@
#ifndef PEI_DATA_H
#define PEI_DATA_H
+#include <compiler.h>
+
typedef void (*tx_byte_func)(unsigned char byte);
#define PEI_VERSION 15
@@ -56,12 +58,12 @@ struct usb2_port_setting {
uint8_t enable;
uint8_t over_current_pin;
uint8_t location;
-} __attribute__((packed));
+} __packed;
struct usb3_port_setting {
uint8_t enable;
uint8_t over_current_pin;
-} __attribute__((packed));
+} __packed;
struct pei_data
{
@@ -110,6 +112,6 @@ struct pei_data
struct usb3_port_setting usb3_ports[MAX_USB3_PORTS];
uint8_t spd_data[4][256];
tx_byte_func tx_byte;
-} __attribute__((packed));
+} __packed;
#endif