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Diffstat (limited to 'src/northbridge/intel/i3100/raminit.h')
| -rw-r--r-- | src/northbridge/intel/i3100/raminit.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/src/northbridge/intel/i3100/raminit.h b/src/northbridge/intel/i3100/raminit.h new file mode 100644 index 0000000000..abaaa1e30f --- /dev/null +++ b/src/northbridge/intel/i3100/raminit.h @@ -0,0 +1,34 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008 Arastra, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + */ + +/* This code is based on src/northbridge/intel/e7520/raminit.h */ + +#ifndef NORTHBRIDGE_INTEL_I3100_RAMINIT_H +#define NORTHBRIDGE_INTEL_I3100_RAMINIT_H + +#define DIMM_SOCKETS 4 +struct mem_controller { + u32 node_id; + device_t f0, f1, f2, f3; + u16 channel0[DIMM_SOCKETS]; + u16 channel1[DIMM_SOCKETS]; +}; + +#endif |