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Diffstat (limited to 'src/northbridge/intel/i3100')
-rw-r--r--src/northbridge/intel/i3100/northbridge.c4
-rw-r--r--src/northbridge/intel/i3100/raminit.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index acd4c3c302..db35b85a6d 100644
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -37,7 +37,7 @@
static u32 max_bus;
-#if CONFIG_WRITE_HIGH_TABLES==1
+#if CONFIG_WRITE_HIGH_TABLES
#include <cbmem.h>
#endif
@@ -129,7 +129,7 @@ static void pci_domain_set_resources(device_t dev)
(remaplimitk + 64*1024) - remapbasek);
}
-#if CONFIG_WRITE_HIGH_TABLES==1
+#if CONFIG_WRITE_HIGH_TABLES
/* Leave some space for ACPI, PIRQ and MP tables */
high_tables_base = (tolmk * 1024) - HIGH_MEMORY_SIZE;
high_tables_size = HIGH_MEMORY_SIZE;
diff --git a/src/northbridge/intel/i3100/raminit.c b/src/northbridge/intel/i3100/raminit.c
index 926d5b3afb..050df951e5 100644
--- a/src/northbridge/intel/i3100/raminit.c
+++ b/src/northbridge/intel/i3100/raminit.c
@@ -1197,7 +1197,7 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
pci_write_config16(ctrl->f0, MCHSCRB, data16);
/* The memory is now setup, use it */
-#if CONFIG_CACHE_AS_RAM == 0
+#if !CONFIG_CACHE_AS_RAM
cache_lbmem(MTRR_TYPE_WRBACK);
#endif
}