diff options
Diffstat (limited to 'src/northbridge/intel/i440bx')
-rw-r--r-- | src/northbridge/intel/i440bx/Kconfig | 2 | ||||
-rw-r--r-- | src/northbridge/intel/i440bx/debug.c | 4 | ||||
-rw-r--r-- | src/northbridge/intel/i440bx/i440bx.h | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig index 4de84d3472..99f043f778 100644 --- a/src/northbridge/intel/i440bx/Kconfig +++ b/src/northbridge/intel/i440bx/Kconfig @@ -30,7 +30,7 @@ config SDRAMPWR_4DIMM This option affects how the SDRAMC register is programmed. Memory clock signals will not be routed properly if this option is set wrong. - + If your board has 4 DIMM slots, you must use select this option, in your Kconfig file of the board. On boards with 3 DIMM slots, do _not_ select this option. diff --git a/src/northbridge/intel/i440bx/debug.c b/src/northbridge/intel/i440bx/debug.c index b437755213..34f4fd4fed 100644 --- a/src/northbridge/intel/i440bx/debug.c +++ b/src/northbridge/intel/i440bx/debug.c @@ -8,8 +8,8 @@ static void dump_spd_registers(void) device = DIMM_SPD_BASE + i; if (device) { int j; - print_debug("dimm: "); - print_debug_hex8(i); + print_debug("dimm: "); + print_debug_hex8(i); print_debug(".0: "); print_debug_hex8(device); for(j = 0; j < 256; j++) { diff --git a/src/northbridge/intel/i440bx/i440bx.h b/src/northbridge/intel/i440bx/i440bx.h index 97311c5fdf..2edbe8ba3f 100644 --- a/src/northbridge/intel/i440bx/i440bx.h +++ b/src/northbridge/intel/i440bx/i440bx.h @@ -72,10 +72,10 @@ #define AGPCTRL 0xb0 /* AGP Control Register (0x00000000) */ #define APSIZE 0xb4 /* Aperture Size Control Register (0x00) */ #define ATTBASE 0xb8 /* Aperture Translation Table (0x00000000) */ - + #define MBFS 0xca /* Memory Buffer Frequency Select (0x000000). */ #define BSPAD 0xd0 /* BIOS Scratch Pad (0x000..000). */ -#define BSPAD0 0xd0 /* These are free for our use. */ +#define BSPAD0 0xd0 /* These are free for our use. */ #define BSPAD1 0xd1 #define BSPAD2 0xd2 #define BSPAD3 0xd3 |