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Diffstat (limited to 'src/northbridge/intel/i440lx')
-rw-r--r--src/northbridge/intel/i440lx/raminit.c8
-rw-r--r--src/northbridge/intel/i440lx/raminit.h3
2 files changed, 4 insertions, 7 deletions
diff --git a/src/northbridge/intel/i440lx/raminit.c b/src/northbridge/intel/i440lx/raminit.c
index dcb22732f2..93fc102f13 100644
--- a/src/northbridge/intel/i440lx/raminit.c
+++ b/src/northbridge/intel/i440lx/raminit.c
@@ -301,18 +301,18 @@ static void sdram_set_spd_registers(void)
PRINT_DEBUG("DIMM");
PRINT_DEBUG_HEX8(i);
PRINT_DEBUG(" rows: ");
- PRINT_DEBUG_HEX8(spd_read_byte(DIMM_SPD_BASE + i, SPD_NUM_DIMM_BANKS) & 0xFF);
+ PRINT_DEBUG_HEX8(spd_read_byte(DIMM0 + i, SPD_NUM_DIMM_BANKS) & 0xFF);
PRINT_DEBUG(" rowsize: ");
- PRINT_DEBUG_HEX8(spd_read_byte(DIMM_SPD_BASE + i, SPD_DENSITY_OF_EACH_ROW_ON_MODULE) & 0xFF);
+ PRINT_DEBUG_HEX8(spd_read_byte(DIMM0 + i, SPD_DENSITY_OF_EACH_ROW_ON_MODULE) & 0xFF);
PRINT_DEBUG(" modulesize: ");
- j = spd_read_byte(DIMM_SPD_BASE + i, SPD_NUM_DIMM_BANKS);
+ j = spd_read_byte(DIMM0 + i, SPD_NUM_DIMM_BANKS);
if (j < 0)
j = 0;
else
ds = j;
- j = spd_read_byte(DIMM_SPD_BASE + i, SPD_DENSITY_OF_EACH_ROW_ON_MODULE);
+ j = spd_read_byte(DIMM0 + i, SPD_DENSITY_OF_EACH_ROW_ON_MODULE);
if (j < 0)
j = 0;
diff --git a/src/northbridge/intel/i440lx/raminit.h b/src/northbridge/intel/i440lx/raminit.h
index 37331f4374..8dcd02b53b 100644
--- a/src/northbridge/intel/i440lx/raminit.h
+++ b/src/northbridge/intel/i440lx/raminit.h
@@ -25,7 +25,4 @@
/* The 440LX supports up to four (single- or double-sided) DIMMs. */
#define DIMM_SOCKETS 4
-/* DIMMs 1-4 are at 0x50, 0x51, 0x52, 0x53. */
-#define DIMM_SPD_BASE 0x50
-
#endif /* RAMINIT_H */